MicrochipFor32/MX_FastSet/T103ZE/MDK-ARM/template/template.axf

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../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00><>"*<2A>
PLLState>#PLLSource>#PLLMUL>#PRCC_PLLInitTypeDef<12>
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P\
../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00><><00> uvoid"<12>"$t>"<10>1PDMA_InitTypeDefh

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<06>6v

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<01>Transmit


<06>6d

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bsp_System\varint.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM|<00>iu8K

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../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00><><00>!*<2A>
Pin>#Mode>#Pull>#Speed>#PGPIO_InitTypeDef<12>
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../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00><><00>"*<2A>(OscillatorType>#HSEState>#HSEPredivValue>#LSEState>#HSIState>#HSICalibrationValue>#LSIState>#PLLVD#PRCC_OscInitTypeDef<12>
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../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00>g<00> *<2A>BaudRate>#WordLength>#StopBits>#Parity>#Mode>#HwFlowCtl>#OverSampling>#PUART_InitTypeDef<12>
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<01>Transmit


<06>6x

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../Core/Src/system_stm32f1xx.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMD
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../Drivers/CMSIS/Include/core_cm3.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMP
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../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00>Z<00>"5"Nt>"<12>8

../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM]<00>"<10>Ot>"<10>D">9<>
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../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.hComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00>5$<13>

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../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMp]Tt>4

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../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00>gd"bT"".">t>"RF9<>
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../Core/Src/stm32f1xx_hal_msp.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00>g\t><00>
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<00>../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<08>?<3F>

<01>
HAL_IncTick
`<00>../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM8D><3E>

<01>
HAL_Init
<10>=8t^__result<10>=
P

../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<r<08>><3E>
<01>
HAL_InitTick
<10>=<r<08>iTickPriority><00>___result<10>=<00>
<00>../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMpuwTickFreq
r 
puwTickPrio> 
puwTick<10>p 

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<01>HAL_UART_Init
<10>=<<08><08>ihuart<10>r.___result<10>=

../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00><08>
<08>?<3F>
<01>
UART_SetConfig<00><08>
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../Core/Src/stm32f1xx_hal_msp.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM|<08><08>?<3F>
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<01><08>YtmpregPt<02>x<16><02><08>\tmpreg><00>../Core/Src/stm32f1xx_it.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMtx4?<3F>

<01>
SysTick_Handler
tx<08><00>../Core/Src/stm32f1xx_it.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMpr<08>?<3F>

<01>
PendSV_Handler
pr<08><00>../Core/Src/stm32f1xx_it.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00><08><08>?<3F>

<01>
DebugMon_Handler
<01><08><08><00>../Core/Src/stm32f1xx_it.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMrt$?<3F>

<01>
SVC_Handler
rt<08><00>../Core/Src/stm32f1xx_it.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00>
<08>
t?<3F>

<01>
UsageFault_Handler
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<08>
<08><00>../Core/Src/stm32f1xx_it.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARM<00><08><08>?<3F>

rBusFault_Handler
<01><08><00>../Core/Src/stm32f1xx_it.cComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]C:\Users\XerolySkinner\Desktop\MDK-ARMln?<3F>

cMemManage_Handler
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THardFault_Handler
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@P16(x) ((u16*)(&(x)))
APn16(x,y) (((u16*)(&(x)))[y])
BP32(x) ((u32*)(&(x)))
CPn32(x,y) (((u32*)(&(x)))[y])
EDelLb(x) (x & (x - 1))
FqDelLb(x) (x=(x & (x - 1)))
HtoBool(x) (x!=0)
IuBit(x,y) (x&(1<<y))
JtBit(x,y) (toBool(uBit(x,y)))
LsBit(x,y) (x|(1<<y))
MrBit(x,y) (x&(~(1<<y)))
NmBit(x,y,z) ((z)?sBit(x,y):rBit(x,y))
PLoopAdd(var,min,step,max) (var<max?var+step:min)
QqLoopAdd(var,min,step,max) (var=var<max?var+step:min)
RLoopDec(var,min,step,max) (var>min?var-step:max)
SqLoopDec(var,min,step,max) (var=var>min?var-step:max)
#$%&'(>

__STM32F1xx_HAL_UART_H 
<01>
HAL_UART_ERROR_NONE 0x00000000U
<01>
HAL_UART_ERROR_PE 0x00000001U
<01>
HAL_UART_ERROR_NE 0x00000002U
<01>
HAL_UART_ERROR_FE 0x00000004U
<01>
HAL_UART_ERROR_ORE 0x00000008U
<01>
HAL_UART_ERROR_DMA 0x00000010U
<01>UART_WORDLENGTH_8B 0x00000000U
<01>UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<01>UART_STOPBITS_1 0x00000000U
<01>UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<01>UART_PARITY_NONE 0x00000000U
<01>UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<01>UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<01>UART_HWCONTROL_NONE 0x00000000U
<01>UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
<01>UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
<01>UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
<01>UART_MODE_RX ((uint32_t)USART_CR1_RE)
<01>UART_MODE_TX ((uint32_t)USART_CR1_TE)
<01>UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE))
<01>UART_STATE_DISABLE 0x00000000U
<01>UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
<01>UART_OVERSAMPLING_16 0x00000000U
<01>UART_LINBREAKDETECTLENGTH_10B 0x00000000U
<01>UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
<01>UART_WAKEUPMETHOD_IDLELINE 0x00000000U
<01>UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
<01>UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
<01>UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
<01>UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<01>UART_FLAG_TC ((uint32_t)USART_SR_TC)
<01>UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<01>UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<01>UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<01>UART_FLAG_NE ((uint32_t)USART_SR_NE)
<01>UART_FLAG_FE ((uint32_t)USART_SR_FE)
<01>UART_FLAG_PE ((uint32_t)USART_SR_PE)
<01>UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
<01>UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
<01>UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
<01>UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
<01>UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
<01>UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
<01>UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
<01>UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
<01>HAL_UART_RECEPTION_STANDARD (0x00000000U)
<01>HAL_UART_RECEPTION_TOIDLE (0x00000001U)
<01>__HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ (__HANDLE__)->gState = HAL_UART_STATE_RESET; (__HANDLE__)->RxState = HAL_UART_STATE_RESET; } while(0U)
<01>__HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<01>__HAL_UART_GET_
RCC_CR_HSION RCC_CR_HSION_Msk
<01>
RCC_CR_HSIRDY_Pos (1U)
<01>
RCC_CR_HSIRDY_Msk (0x1UL << RCC_CR_HSIRDY_Pos)
<01>
RCC_CR_HSIRDY RCC_CR_HSIRDY_Msk
<01>
RCC_CR_HSITRIM_Pos (3U)
<01>
RCC_CR_HSITRIM_Msk (0x1FUL << RCC_CR_HSITRIM_Pos)
<01>
RCC_CR_HSITRIM RCC_CR_HSITRIM_Msk
<01>
RCC_CR_HSICAL_Pos (8U)
<01>
RCC_CR_HSICAL_Msk (0xFFUL << RCC_CR_HSICAL_Pos)
<01>
RCC_CR_HSICAL RCC_CR_HSICAL_Msk
<01>
RCC_CR_HSEON_Pos (16U)
<01>
RCC_CR_HSEON_Msk (0x1UL << RCC_CR_HSEON_Pos)
<01>
RCC_CR_HSEON RCC_CR_HSEON_Msk
<01>
RCC_CR_HSERDY_Pos (17U)
<01>
RCC_CR_HSERDY_Msk (0x1UL << RCC_CR_HSERDY_Pos)
<01>
RCC_CR_HSERDY RCC_CR_HSERDY_Msk
<01>
RCC_CR_HSEBYP_Pos (18U)
<01>
RCC_CR_HSEBYP_Msk (0x1UL << RCC_CR_HSEBYP_Pos)
<01>
RCC_CR_HSEBYP RCC_CR_HSEBYP_Msk
<01>
RCC_CR_CSSON_Pos (19U)
<01>
RCC_CR_CSSON_Msk (0x1UL << RCC_CR_CSSON_Pos)
<01>
RCC_CR_CSSON RCC_CR_CSSON_Msk
<01>
RCC_CR_PLLON_Pos (24U)
<01>
RCC_CR_PLLON_Msk (0x1UL << RCC_CR_PLLON_Pos)
<01>
RCC_CR_PLLON RCC_CR_PLLON_Msk
<01>
RCC_CR_PLLRDY_Pos (25U)
<01>
RCC_CR_PLLRDY_Msk (0x1UL << RCC_CR_PLLRDY_Pos)
<01>
RCC_CR_PLLRDY RCC_CR_PLLRDY_Msk
<01>
RCC_CFGR_SW_Pos (0U)
<01>
RCC_CFGR_SW_Msk (0x3UL << RCC_CFGR_SW_Pos)
<01>
RCC_CFGR_SW RCC_CFGR_SW_Msk
<01>
RCC_CFGR_SW_0 (0x1UL << RCC_CFGR_SW_Pos)
<01>
RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos)
<01>
RCC_CFGR_SW_HSI 0x00000000U
<01>
RCC_CFGR_SW_HSE 0x00000001U
<01>
RCC_CFGR_SW_PLL 0x00000002U
<01>
RCC_CFGR_SWS_Pos (2U)
<01>
RCC_CFGR_SWS_Msk (0x3UL << RCC_CFGR_SWS_Pos)
<01>
RCC_CFGR_SWS RCC_CFGR_SWS_Msk
<01>
RCC_CFGR_SWS_0 (0x1UL << RCC_CFGR_SWS_Pos)
<01>
RCC_CFGR_SWS_1 (0x2UL << RCC_CFGR_SWS_Pos)
<01>
RCC_CFGR_SWS_HSI 0x00000000U
<01>
RCC_CFGR_SWS_HSE 0x00000004U
<01>
RCC_CFGR_SWS_PLL 0x00000008U
<01>
RCC_CFGR_HPRE_Pos (4U)
<01>
RCC_CFGR_HPRE_Msk (0xFUL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk
<01>
RCC_CFGR_HPRE_0 (0x1UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_1 (0x2UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_2 (0x4UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_3 (0x8UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_DIV1 0x00000000U
<01>
RCC_CFGR_HPRE_DIV2 0x00000080U
<01>
RCC_CFGR_HPRE_DIV4 0x00000090U
<01>
RCC_CFGR_HPRE_DIV8 0x000000A0U
<01>
RCC_CFGR_HPRE_DIV16 0x000000B0U
<01>
RCC_CFGR_HPRE_DIV64 0x000000C0U
<01>
RCC_CFGR_HPRE_DIV128 0x000000D0U
<01>
RCC_CFGR_HPRE_DIV256 0x000000E0U
<01>
RCC_CFGR_HPRE_DIV512 0x000000F0U
<01>
RCC_CFGR_PPRE1_Pos (8U)
<01>
RCC_CFGR_PPRE1_Msk (0x7UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk
<01>
RCC_CFGR_PPRE1_0 (0x1UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1_1 (0x2UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1_2 (0x4UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1_DIV1 0x00000000U
<01>
RCC_CFGR_PPRE1_DIV2 0x00000400U
<01>
RCC_CFGR_PPRE1_DIV4 0x00000500U
<01>
RCC_CFGR_PPRE1_DIV8 0x00000600U
<01>
RCC_CFGR_PPRE1_DIV16 0x00000700U
<01>
RCC_CFGR_PPRE2_Pos (11U)
<01>
RCC_CFGR_PPRE2_Msk (0x7UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_Msk
<01>
RCC_CFGR_PPRE2_0 (0x1UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2_1 (0x2UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2_2 (0x4UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2_DIV1 0x00000000U
<01>
RCC_CFGR_PPRE2_DIV2 0x00002000U
<01>
RCC_CFGR_PPRE2_DIV4 0x00002800U
<01>
RCC_CFGR_PPRE2_DIV8 0x00003000U
<01>
RCC_CFGR_PPRE2_DIV16 0x00003800U
<01>
RCC_CFGR_ADCPRE_Pos (14U)
<01>
RCC_CFGR_ADCPRE_Msk (0x3UL << RCC_CFGR_ADCPRE_Pos)
<01>
RCC_CFGR_ADCPRE RCC_CFGR_ADCPRE_Msk
<01>
RCC_CFGR_ADCPRE_0 (0x1UL << RCC_CFGR_ADCPRE_Pos)
<01>
RCC_CFGR_ADCPRE_1 (0x2UL << RCC_CFGR_ADCPRE_Pos)
<01>
RCC_CFGR_ADCPRE_DIV2 0x00000000U
<01>
RCC_CFGR_ADCPRE_DIV4 0x00004000U
<01>
RCC_CFGR_ADCPRE_DIV6 0x00008000U
<01>
RCC_CFGR_ADCPRE_DIV8 0x0000C000U
<01>
RCC_CFGR_PLLSRC_Pos (16U)
<01>
RCC_CFGR_PLLSRC_Msk (0x1UL << RCC_CFGR_PLLSRC_Pos)
<01>
RCC_CFGR_PLLSRC RCC_CFGR_PLLSRC_Msk
<01>
RCC_CFGR_PLLXTPRE_Pos (17U)
<01>
RCC_CFGR_PLLXTPRE_Msk (0x1UL << RCC_CFGR_PLLXTPRE_Pos)
<01>
RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk
<01>
RCC_CFGR_PLLMULL_Pos (18U)
<01>
RCC_CFGR_PLLMULL_Msk (0xFUL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL RCC_CFGR_PLLMULL_Msk
<01>
RCC_CFGR_PLLMULL_0 (0x1UL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL_1 (0x2UL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL_2 (0x4UL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL_3 (0x8UL << RCC_CFGR_PLLMULL_Pos)
<01>RCC_CFGR_PLLXTPRE_HSE 0x00000000U
<01>RCC_CFGR_PLLXTPRE_HSE_DIV2 0x00020000U
<01>RCC_CFGR_PLLMULL2 0x00000000U
<01>RCC_CFGR_PLLMULL3_Pos (18U)
<01>RCC_CFGR_PLLMULL3_Msk (0x1UL << RCC_CFGR_PLLMULL3_Pos)
<01>RCC_CFGR_PLLMULL3 RCC_CFGR_PLLMULL3_Msk
<01>RCC_CFGR_PLLMULL4_Pos (19U)
<01>RCC_CFGR_PLLMULL4_Msk (0x1UL << RCC_CFGR_PLLMULL4_Pos)
<01>RCC_CFGR_PLLMULL4 RCC_CFGR_PLLMULL4_Msk
<01>RCC_CFGR_PLLMULL5_Pos (18U)
<01>RCC_CFGR_PLLMULL5_Msk (0x3UL << RCC_CFGR_PLLMULL5_Pos)
<01>RCC_CFGR_PLLMULL5 RCC_CFGR_PLLMULL5_Msk
<01>RCC_CFGR_PLLMULL6_Pos (20U)
<01>RCC_CFGR_PLLMULL6_Msk (0x1UL << RCC_CFGR_PLLMULL6_Pos)
<01>RCC_CFGR_PLLMULL6 RCC_CFGR_PLLMULL6_Msk
<01>RCC_CFGR_PLLMULL7_Pos (18U)
<01>RCC_CFGR_PLLMULL7_Msk (0x5UL << RCC_CFGR_PLLMULL7_Pos)
<01>RCC_CFGR_PLLMULL7 RCC_CFGR_PLLMULL7_Msk
<01>RCC_CFGR_PLLMULL8_Pos (19U)
<01>RCC_CFGR_PLLMULL8_Msk (0x3UL << RCC_CFGR_PLLMULL8_Pos)
<01>RCC_CFGR_PLLMULL8 RCC_CFGR_PLLMULL8_Msk
<01>RCC_CFGR_PLLMULL9_Pos (18U)
<01>RCC_CFGR_PLLMULL9_Msk (0x7UL << RCC_CFGR_PLLMULL9_Pos)
<01>RCC_CFGR_PLLMULL9 RCC_CFGR_PLLMULL9_Msk
<01>RCC_CFGR_PLLMULL10_Pos (21U)
<01>RCC_CFGR_PLLMULL10_Msk (0x1UL << RCC_CFGR_PLLMULL10_Pos)
<01>RCC_CFGR_PLLMULL10 RCC_CFGR_PLLMULL10_Msk
<01>RCC_CFGR_PLLMULL11_Pos (18U)
<01>RCC_CFGR_PLLMULL11_Msk (0x9UL << RCC_CFGR_PLLMULL11_Pos)
<01>RCC_CFGR_PLLMULL11 RCC_CFGR_PLLMULL11_Msk
<01>RCC_CFGR_PLLMULL12_Pos (19U)
<01>RCC_CFGR_PLLMULL12_Msk (0x5UL << RCC_CFGR_PLLMULL12_Pos)
<01>RCC_CFGR_PLLMULL12 RCC_CFGR_PLLMULL12_Msk
<01>RCC_CFGR_PLLMULL13_Pos (18U)
<01>RCC_CFGR_PLLMULL13_Msk (0xBUL << RCC_CFGR_PLLMULL13_Pos)
<01>RCC_CFGR_PLLMULL13 RCC_CFGR_PLLMULL13_Msk
<01>RCC_CFGR_PLLMULL14_Pos (20U)
<01>RCC_CFGR_PLLMULL14_Msk (0x3UL << RCC_CFGR_PLLMULL14_Pos)
<01>RCC_CFGR_PLLMULL14 RCC_CFGR_PLLMULL14_Msk
<01>RCC_CFGR_PLLMULL15_Pos (18U)
<01>RCC_CFGR_PLLMULL15_Msk (0xDUL << RCC_CFGR_PLLMULL15_Pos)
<01>RCC_CFGR_PLLMULL15 RCC_CFGR_PLLMULL15_Msk
<01>RCC_CFGR_PLLMULL16_Pos (19U)
<01>RCC_CFGR_PLLMULL16_Msk (0x7UL << RCC_CFGR_PLLMULL16_Pos)
<01>RCC_CFGR_PLLMULL16 RCC_CFGR_PLLMULL16_Msk
<01>RCC_CFGR_USBPRE_Pos (22U)
<01>RCC_CFGR_USBPRE_Msk (0x1UL << RCC_CFGR_USBPRE_Pos)
<01>RCC_CFGR_USBPRE RCC_CFGR_USBPRE_Msk
<01>RCC_CFGR_MCO_Pos (24U)
<01>RCC_CFGR_MCO_Msk (0x7UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO RCC_CFGR_MCO_Msk
<01>RCC_CFGR_MCO_0 (0x1UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO_1 (0x2UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO_2 (0x4UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO_NOCLOCK 0x00000000U
<01>RCC_CFGR_MCO_SYSCLK 0x04000000U
<01>RCC_CFGR_MCO_HSI 0x05000000U
<01>RCC_CFGR_MCO_HSE 0x06000000U
<01>RCC_CFGR_MCO_PLLCLK_DIV2 0x07000000U
<01>RCC_CFGR_MCOSEL RCC_CFGR_MCO
<01>RCC_CFGR_MCOSEL_0 RCC_CFGR_MCO_0
<01>RCC_CFGR_MCOSEL_1 RCC_CFGR_MCO_1
<01>RCC_CFGR_MCOSEL_2 RCC_CFGR_MCO_2
<01>RCC_CFGR_MCOSEL_NOCLOCK RCC_CFGR_MCO_NOCLOCK
<01>RCC_CFGR_MCOSEL_SYSCLK RCC_CFGR_MCO_SYSCLK
<01>RCC_CFGR_MCOSEL_HSI RCC_CFGR_MCO_HSI
<01>RCC_CFGR_MCOSEL_HSE RCC_CFGR_MCO_HSE
<01>RCC_CFGR_MCOSEL_PLL_DIV2 RCC_CFGR_MCO_PLLCLK_DIV2
<01>RCC_CIR_LSIRDYF_Pos (0U)
<01>RCC_CIR_LSIRDYF_Msk (0x1UL << RCC_CIR_LSIRDYF_Pos)
<01>RCC_CIR_LSIRDYF RCC_CIR_LSIRDYF_Msk
<01>RCC_CIR_LSERDYF_Pos (1U)
<01>RCC_CIR_LSERDYF_Msk (0x1UL << RCC_CIR_LSERDYF_Pos)
<01>RCC_CIR_LSERDYF RCC_CIR_LSERDYF_Msk
<01>RCC_CIR_HSIRDYF_Pos (2U)
<01>RCC_CIR_HSIRDYF_Msk (0x1UL << RCC_CIR_HSIRDYF_Pos)
<01>RCC_CIR_HSIRDYF RCC_CIR_HSIRDYF_Msk
<01>RCC_CIR_HSERDYF_Pos (3U)
<01>RCC_CIR_HSERDYF_Msk (0x1UL << RCC_CIR_HSERDYF_Pos)
<01>RCC_CIR_HSERDYF RCC_CIR_HSERDYF_Msk
<01>RCC_CIR_PLLRDYF_Pos (4U)
<01>RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos)
<01>RCC_CIR_PLLRDYF RCC_CIR_PLLRDYF_Msk
<01>RCC_CIR_CSSF_Pos (7U)
<01>RCC_CIR_CSSF_Msk (0x1UL << RCC_CIR_CSSF_Pos)
<01>RCC_CIR_CSSF RCC_CIR_CSSF_Msk
<01>RCC_CIR_LSIRDYIE_Pos (8U)
<01>RCC_CIR_LSIRDYIE_Msk (0x1UL << RCC_CIR_LSIRDYIE_Pos)
<01>RCC_CIR_LSIRDYIE RCC_CIR_LSIRDYIE_Msk
<01>RCC_CIR_LSERDYIE_Pos (9U)
<01>RCC_CIR_LSERDYIE_Msk (0x1UL << RCC_CIR_LSERDYIE_Pos)
<01>RCC_CIR_LSERDYIE RCC_CIR_LSERDYIE_Msk
<01>RCC_CIR_HSIRDYIE_Pos (10U)
<01>RCC_CIR_HSIRDYIE_Msk (0x1UL << RCC_CIR_HSIRDYIE_Pos)
<01>RCC_CIR_HSIRDYIE RCC_CIR_HSIRDYIE_Msk
<01>RCC_CIR_HSERDYIE_Pos (11U)
<01>RCC_CIR_HSERDYIE_
CoreDebug_DHCSR_S_REGRDY_Pos 16U
<01>
CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
<01>
CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U
<01>
CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
<01>
CoreDebug_DHCSR_C_MASKINTS_Pos 3U
<01>
CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
<01>
CoreDebug_DHCSR_C_STEP_Pos 2U
<01>
CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
<01>
CoreDebug_DHCSR_C_HALT_Pos 1U
<01>
CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
<01>
CoreDebug_DHCSR_C_DEBUGEN_Pos 0U
<01>
CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL )
<01>
CoreDebug_DCRSR_REGWnR_Pos 16U
<01>
CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
<01>
CoreDebug_DCRSR_REGSEL_Pos 0U
<01>
CoreDebug_DCRSR_REGSEL_Msk (0x1FUL )
<01>
CoreDebug_DEMCR_TRCENA_Pos 24U
<01>
CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
<01>
CoreDebug_DEMCR_MON_REQ_Pos 19U
<01>
CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
<01>
CoreDebug_DEMCR_MON_STEP_Pos 18U
<01>
CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
<01>
CoreDebug_DEMCR_MON_PEND_Pos 17U
<01>
CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
<01>
CoreDebug_DEMCR_MON_EN_Pos 16U
<01>
CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
<01>
CoreDebug_DEMCR_VC_HARDERR_Pos 10U
<01>
CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
<01>
CoreDebug_DEMCR_VC_INTERR_Pos 9U
<01>
CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
<01>
CoreDebug_DEMCR_VC_BUSERR_Pos 8U
<01>
CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
<01>
CoreDebug_DEMCR_VC_STATERR_Pos 7U
<01>
CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
<01>
CoreDebug_DEMCR_VC_CHKERR_Pos 6U
<01>
CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
<01>
CoreDebug_DEMCR_VC_NOCPERR_Pos 5U
<01>
CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
<01>
CoreDebug_DEMCR_VC_MMERR_Pos 4U
<01>
CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
<01>
CoreDebug_DEMCR_VC_CORERESET_Pos 0U
<01>
CoreDebug_DEMCR_VC_CORERESET_Msk (1UL )
<01>
_VAL2FLD(field,value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
<01>
_FLD2VAL(field,value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
<01>
SCS_BASE (0xE000E000UL)
<01>
ITM_BASE (0xE0000000UL)
<01>
DWT_BASE (0xE0001000UL)
<01>
TPI_BASE (0xE0040000UL)
<01>
CoreDebug_BASE (0xE000EDF0UL)
<01>
SysTick_BASE (SCS_BASE + 0x0010UL)
<01>
NVIC_BASE (SCS_BASE + 0x0100UL)
<01>
SCB_BASE (SCS_BASE + 0x0D00UL)
<01>
SCnSCB ((SCnSCB_Type *) SCS_BASE )
<01>
SCB ((SCB_Type *) SCB_BASE )
<01>
SysTick ((SysTick_Type *) SysTick_BASE )
<01>
NVIC ((NVIC_Type *) NVIC_BASE )
<01>
ITM ((ITM_Type *) ITM_BASE )
<01>
DWT ((DWT_Type *) DWT_BASE )
<01>
TPI ((TPI_Type *) TPI_BASE )
<01>
CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)
<01>NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
<01>NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
<01>NVIC_EnableIRQ __NVIC_EnableIRQ
<01>NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
<01>NVIC_DisableIRQ __NVIC_DisableIRQ
<01>NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
<01>NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
<01>NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
<01>NVIC_GetActive __NVIC_GetActive
<01>NVIC_SetPriority __NVIC_SetPriority
<01>NVIC_GetPriority __NVIC_GetPriority
<01>NVIC_SystemReset __NVIC_SystemReset
<01>NVIC_SetVector __NVIC_SetVector
<01>NVIC_GetVector __NVIC_GetVector
<01>NVIC_USER_IRQ_OFFSET 16
<01>EXC_RETURN_HANDLER (0xFFFFFFF1UL)
<01>EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL)
<01>EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL)
<01>ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U)
i
{GPIO_MODE 0x00000003u
|EXTI_MODE 0x10000000u
}GPIO_MODE_IT 0x00010000u
~GPIO_MODE_EVT 0x00020000u
RISING_EDGE 0x00100000u
<01>
FALLING_EDGE 0x00200000u
<01>
GPIO_OUTPUT_TYPE 0x00000010u
<01>
GPIO_NUMBER 16u
<01>
GPIO_CR_MODE_INPUT 0x00000000u
<01>
GPIO_CR_CNF_ANALOG 0x00000000u
<01>
GPIO_CR_CNF_INPUT_FLOATING 0x00000004u
<01>
GPIO_CR_CNF_INPUT_PU_PD 0x00000008u
<01>
GPIO_CR_CNF_GP_OUTPUT_PP 0x00000000u
<01>
GPIO_CR_CNF_GP_OUTPUT_OD 0x00000004u
<01>
GPIO_CR_CNF_AF_OUTPUT_PP 0x00000008u
<01>
GPIO_CR_CNF_AF_OUTPUT_OD 0x0000000Cu
?
YMCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
ZMCO1_GPIO_PORT GPIOA
[MCO1_PIN GPIO_PIN_8
$
:__STM32F1xx_HAL_VERSION_MAIN (0x01U)
;__STM32F1xx_HAL_VERSION_SUB1 (0x01U)
<__STM32F1xx_HAL_VERSION_SUB2 (0x08U)
=__STM32F1xx_HAL_VERSION_RC (0x00U)
>__STM32F1xx_HAL_VERSION ((__STM32F1xx_HAL_VERSION_MAIN << 24) |(__STM32F1xx_HAL_VERSION_SUB1 << 16) |(__STM32F1xx_HAL_VERSION_SUB2 << 8 ) |(__STM32F1xx_HAL_VERSION_RC))
CIDCODE_DEVID_MASK 0x00000FFFU

__STM32F1xx_HAL_H 
X__HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
Y__HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
^__HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
___HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
e__HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
f__HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
m__HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
n__HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
u__HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
v__HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
}__HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
~__HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
<01>
__HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
<01>
__HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
<01>
__HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
<01>
__HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
<01>
__HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
<01>
__HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
<01>
__HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
<01>
__HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
<01>
__HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
<01>
__HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
<01>
__HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
<01>
__HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
<01>
__HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
<01>
__HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
<01>IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || ((FREQ) == HAL_TICK_FREQ_100HZ) || ((FREQ) == HAL_TICK_FREQ_1KHZ))
<03>




RCC_CR_BYTE2_ADDRESS ((uint32_t)(RCC_BASE + RCC_CR_OFFSET + 0x02U))
<01>
RCC_CIR_BYTE1_ADDRESS ((uint32_t)(RCC_BASE + RCC_CIR_OFFSET + 0x01U))
<01>
RCC_CIR_BYTE2_ADDRESS ((uint32_t)(RCC_BASE + RCC_CIR_OFFSET + 0x02U))
<01>
CR_REG_INDEX ((uint8_t)1)
<01>
BDCR_REG_INDEX ((uint8_t)2)
<01>
CSR_REG_INDEX ((uint8_t)3)
<01>
RCC_FLAG_MASK ((uint8_t)0x1F)
<01>
__HAL_RCC_SYSCFG_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
<01>
__HAL_RCC_SYSCFG_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
<01>
__HAL_RCC_SYSCFG_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
<01>
__HAL_RCC_SYSCFG_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
<01>
IS_RCC_PLLSOURCE(__SOURCE__) (((__SOURCE__) == RCC_PLLSOURCE_HSI_DIV2) || ((__SOURCE__) == RCC_PLLSOURCE_HSE))
<01>
IS_RCC_OSCILLATORTYPE(__OSCILLATOR__) (((__OSCILLATOR__) == RCC_OSCILLATORTYPE_NONE) || (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) || (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) || (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) || (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE))
<01>
IS_RCC_HSE(__HSE__) (((__HSE__) == RCC_HSE_OFF) || ((__HSE__) == RCC_HSE_ON) || ((__HSE__) == RCC_HSE_BYPASS))
<01>
IS_RCC_LSE(__LSE__) (((__LSE__) == RCC_LSE_OFF) || ((__LSE__) == RCC_LSE_ON) || ((__LSE__) == RCC_LSE_BYPASS))
<01>
IS_RCC_HSI(__HSI__) (((__HSI__) == RCC_HSI_OFF) || ((__HSI__) == RCC_HSI_ON))
<01>
IS_RCC_CALIBRATION_VALUE(__VALUE__) ((__VALUE__) <= 0x1FU)
<01>
IS_RCC_LSI(__LSI__) (((__LSI__) == RCC_LSI_OFF) || ((__LSI__) == RCC_LSI_ON))
<01>
IS_RCC_PLL(__PLL__) (((__PLL__) == RCC_PLL_NONE) || ((__PLL__) == RCC_PLL_OFF) || ((__PLL__) == RCC_PLL_ON))
<01>
IS_RCC_CLOCKTYPE(CLK) ((((CLK) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) || (((CLK) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) || (((CLK) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) || (((CLK) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2))
<01>
IS_RCC_SYSCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_SYSCLKSOURCE_HSI) || ((__SOURCE__) == RCC_SYSCLKSOURCE_HSE) || ((__SOURCE__) == RCC_SYSCLKSOURCE_PLLCLK))
<01>
IS_RCC_SYSCLKSOURCE_STATUS(__SOURCE__) (((__SOURCE__) == RCC_SYSCLKSOURCE_STATUS_HSI) || ((__SOURCE__) == RCC_SYSCLKSOURCE_STATUS_HSE) || ((__SOURCE__) == RCC_SYSCLKSOURCE_STATUS_PLLCLK))
<01>
IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) || ((__HCLK__) == RCC_SYSCLK_DIV4) || ((__HCLK__) == RCC_SYSCLK_DIV8) || ((__HCLK__) == RCC_SYSCLK_DIV16) || ((__HCLK__) == RCC_SYSCLK_DIV64) || ((__HCLK__) == RCC_SYSCLK_DIV128) || ((__HCLK__) == RCC_SYSCLK_DIV256) || ((__HCLK__) == RCC_SYSCLK_DIV512))
<01>
IS_RCC_PCLK(__PCLK__) (((__PCLK__) == RCC_HCLK_DIV1) || ((__PCLK__) == RCC_HCLK_DIV2) || ((__PCLK__) == RCC_HCLK_DIV4) || ((__PCLK__) == RCC_HCLK_DIV8) || ((__PCLK__) == RCC_HCLK_DIV16))
<01>
IS_RCC_MCO(__MCO__) ((__MCO__) == RCC_MCO)
<01>
IS_RCC_MCODIV(__DIV__) (((__DIV__) == RCC_MCODIV_1))
<01>
IS_RCC_RTCCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_RTCCLKSOURCE_NO_CLK) || ((__SOURCE__) == RCC_RTCCLKSOURCE_LSE) || ((__SOURCE__) == RCC_RTCCLKSOURCE_LSI) || ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV128))

__STM32F1xx_HAL_RCC_EX_H 
:CR_REG_INDEX ((uint8_t)1)
UIS_RCC_HSE_PREDIV(__DIV__) (((__DIV__) == RCC_HSE_PREDIV_DIV1) || ((__DIV__) == RCC_HSE_PREDIV_DIV2))
eIS_RCC_PLL_MUL(__MUL__) (((__MUL__) == RCC_PLL_MUL2) || ((__MUL__) == RCC_PLL_MUL3) || ((__MUL__) == RCC_PLL_MUL4) || ((__MUL__) == RCC_PLL_MUL5) || ((__MUL__) == RCC_PLL_MUL6) || ((__MUL__) == RCC_PLL_MUL7) || ((__MUL__) == RCC_PLL_MUL8) || ((__MUL__) == RCC_PLL_MUL9) || ((__MUL__) == RCC_PLL_MUL10) || ((__MUL__) == RCC_PLL_MUL11) || ((__MUL__) == RCC_PLL_MUL12) || ((__MUL__) == RCC_PLL_MUL13) || ((__MUL__) == RCC_PLL_MUL14) || ((__MUL__) == RCC_PLL_MUL15) || ((__MUL__) == RCC_PLL_MUL16))
nIS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || ((__SOURCE__) == RCC_MCO1SOURCE_HSI) || ((__SOURCE__) == RCC_MCO1SOURCE_HSE) || ((__SOURCE__) == RCC_MCO1SOURCE_PLLCLK) || ((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK))
tIS_RCC_ADCPLLCLK_DIV(__ADCCLK__) (((__ADCCLK__) == RCC_ADCPCLK2_DIV2) || ((__ADCCLK__) == RCC_ADCPCLK2_DIV4) || ((__ADCCLK__) == RCC_ADCPCLK2_DIV6) || ((__ADCCLK__) == RCC_ADCPCLK2_DIV8))
<01>
IS_RCC_I2S2CLKSOURCE(__SOURCE__) ((__SOURCE__) == RCC_I2S2CLKSOURCE_SYSCLK)
<01>
IS_RCC_I2S3CLKSOURCE(__SOURCE__) ((__SOURCE__) == RCC_I2S3CLKSOURCE_SYSCLK)
<01>
IS_RCC_PERIPHCLOCK(__SELECTION__) ((((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || (((__SELECTION__) & RCC_PERIPHCLK_I2S2) == RCC_PERIPHCLK_I2S2) || (((__SELECTION__) & RCC_PERIPHCLK_I2S3) == RCC_PERIPHCLK_I2S3) || (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB))
<01>
IS_RCC_USBPLLCLK_DIV(__USBCLK__) (((__USBCLK__) == RCC_USBCLKSOURCE_PLL) || ((__USBCLK__) == RCC_USBCLKSOURCE_PLL_DIV1_5))
<01>RCC_PERIPHCLK_RTC 0x00000001U
<01>RCC_PERIPHCLK_ADC 0x00000002U
<01>RCC_PERIPHCLK_I2S2 0x00000004U
<01>RCC_PERIPHCLK_I2S3 0x00000008U
<01>RCC_PERIPHCLK_USB 0x00000010U
<01>RCC_ADCPCLK2_DIV2 RCC_CFGR_ADCPRE_DIV2
<01>RCC_ADCPCLK2_DIV4 RCC_CFGR_ADCPRE_DIV4
<01>RCC_ADCPCLK2_DIV6 RCC_CFGR_ADCPRE_DIV6
<01>RCC_ADCPCLK2_DIV8 RCC_CFGR_ADCPRE_DIV8
<01>RCC_I2S2CLKSOURCE_SYSCLK 0x00000000U
<01>RCC_I2S3CLKSOURCE_SYSCLK 0x00000000U
<01>RCC_USBCLKSOURCE_PLL RCC_CFGR_USBPRE
<01>RCC_USBCLKSOURCE_PLL_DIV1_5 0x00000000U
<01>RCC_HSE_PREDIV_DIV1 0x00000000U
<01>RCC_HSE_PREDIV_DIV2 RCC_CFGR_PLLXTPRE
<01>RCC_PLL_MUL2 RCC_CFGR_PLLMULL2
<01>RCC_PLL_MUL3 RCC_CFGR_PLLMULL3
<01>RCC_PLL_MUL4 RCC_CFGR_PLLMULL4
<01>RCC_PLL_MUL5 RCC_CFGR_PLLMULL5
<01>RCC_PLL_MUL6 RCC_CFGR_PLLMULL6
<01>RCC_PLL_MUL7 RCC_CFGR_PLLMULL7
<01>RCC_PLL_MUL8 RCC_CFGR_PLLMULL8
<01>RCC_PLL_MUL9 RCC_CFGR_PLLMULL9
<01>RCC_PLL_MUL10 RCC_CFGR_PLLMULL10
<01>RCC_PLL_MUL11 RCC_CFGR_PLLMULL11
<01>RCC_PLL_MUL12 RCC_CFGR_PLLMULL12
<01>RCC_PLL_MUL13 RCC_CFGR_PLLMULL13
<01>RCC_PLL_MUL14 RCC_CFGR_PLLMULL14
<01>RCC_PLL_MUL15 RCC_CFGR_PLLMULL15
<01>RCC_PLL_MUL16 RCC_CFGR_PLLMULL16
<01>RCC_MCO1SOURCE_NOCLOCK ((uint32_t)RCC_CFGR_MCO_NOCLOCK)
<01>RCC_MCO1SOURCE_SYSCLK ((uint32_t)RCC_CFGR_MCO_SYSCLK)
<01>RCC_MCO1SOURCE_HSI ((uint32_t)RCC_CFGR_MCO_HSI)
<01>RCC_MCO1SOURCE_HSE ((uint32_t)RCC_CFGR_MCO_HSE)
<01>RCC_MCO1SOURCE_PLLCLK ((uint32_t)RCC_CFGR_MCO_PLLCLK_DIV2)
<01>__HAL_RCC_DMA2_CLK_ENABLE() do { __IO uint32_t tmpreg; SET_BIT(RCC->AHBENR, RCC_AHBENR_DMA2EN); tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA2EN); UNUSED(tmpreg); } while(0U)
<01>__HAL_RCC_DMA2_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_DMA2EN))
<01>__HAL_RCC_FSMC_CLK_ENABLE() do { __IO uint32_t tmpreg; SET_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); UNUSED(tmpreg); } while(0U)
<01>__HAL_RCC_FSMC_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_FSMCEN))
<01>__HAL_RCC_SDIO_CLK_ENABLE() do { __IO uint32_t tmpreg; SET_BIT(RCC->AHBENR, RCC_AHBENR_SDIOEN); tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_SDIOEN); UNUSED(tmpreg); } while(0U)
<01>__HAL_RCC_SDIO_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_SDIOEN))
<01>__HAL_RCC_DMA2_IS_CL
__HAL_RCC_ADC2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) != RESET)
<01>
__HAL_RCC_ADC2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) == RESET)
<01>
__HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_IOPEEN)) != RESET)
<01>
__HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_IOPEEN)) == RESET)
<01>
__HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_IOPFEN)) != RESET)
<01>
__HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_IOPFEN)) == RESET)
<01>
__HAL_RCC_GPIOG_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_IOPGEN)) != RESET)
<01>
__HAL_RCC_GPIOG_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_IOPGEN)) == RESET)
<01>
__HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
<01>
__HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
<01>
__HAL_RCC_ADC3_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) != RESET)
<01>
__HAL_RCC_ADC3_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) == RESET)
<01>__HAL_RCC_CAN1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN1RST))
<01>__HAL_RCC_CAN1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN1RST))
<01>__HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
<01>__HAL_RCC_SPI2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI2RST))
<01>__HAL_RCC_USART3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USART3RST))
<01>__HAL_RCC_I2C2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C2RST))
<01>__HAL_RCC_TIM4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
<01>__HAL_RCC_SPI2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI2RST))
<01>__HAL_RCC_USART3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART3RST))
<01>__HAL_RCC_I2C2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C2RST))
<01>__HAL_RCC_USB_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USBRST))
<01>__HAL_RCC_USB_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USBRST))
<01>__HAL_RCC_TIM5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST))
<01>__HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST))
<01>__HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST))
<01>__HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
<01>__HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
<01>__HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
<01>__HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST))
<01>__HAL_RCC_TIM5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST))
<01>__HAL_RCC_TIM6_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM6RST))
<01>__HAL_RCC_TIM7_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM7RST))
<01>__HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
<01>__HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
<01>__HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
<01>__HAL_RCC_DAC_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_DACRST))
<01>__HAL_RCC_ADC2_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_ADC2RST))
<01>__HAL_RCC_ADC2_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_ADC2RST))
<01>__HAL_RCC_GPIOE_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_IOPERST))
<01>__HAL_RCC_GPIOE_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_IOPERST))
<01>__HAL_RCC_GPIOF_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_IOPFRST))
<01>__HAL_RCC_GPIOG_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_IOPGRST))
<01>__HAL_RCC_GPIOF_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_IOPFRST))
<01>__HAL_RCC_GPIOG_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_IOPGRST))
<01>__HAL_RCC_TIM8_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM8RST))
<01>__HAL_RCC_ADC3_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_ADC3RST))
<01>__HAL_RCC_TIM8_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM8RST))
<01>__HAL_RCC_ADC3_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_ADC3RST))
<01>__HAL_RCC_HSE_PREDIV_CONFIG(__HSE_PREDIV_VALUE__) MODIFY_REG(RCC->CFGR,RCC_CFGR_PLLXTPRE, (uint32_t)(__HSE_PREDIV_VALUE__))
<01>__HAL_RCC_HSE_GET_PREDIV() READ_BIT(RCC->CFGR, RCC_CFGR_PLLXTPRE)
<01>
__HAL_RCC_USB_CONFIG(__USBCLKSOURCE__) MODIFY_REG(RCC->CFGR, RCC_CFGR_USBPRE, (uint32_t)(__USBCLKSOURCE__))
<01>
__HAL_RCC_GET_USB_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_USBPRE)))
<01>
__HAL_RCC_ADC_CONFIG(__ADCCLKSOURCE__) MODIFY_REG(RCC->CFGR, RCC_CFGR_ADCPRE, (uint32_t)(__ADCCLKSOURCE__))
<01>
__HAL_RCC_GET_ADC_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_ADCPRE)))

__STM32F1xx_HAL_DEF  
9HAL_MAX_DELAY 0xFFFFFFFFU
;HAL_IS_BIT_SET(REG,BIT) (((REG) & (BIT)) != 0U)
<HAL_IS_BIT_CLR(REG,BIT) (((REG) & (BIT)) == 0U)
>__HAL_LINKDMA(__HANDLE__,__PPP_DMA_FIELD__,__DMA_HANDLE__) do{ (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); (__DMA_HANDLE__).Parent = (__HANDLE__); } while(0U)
DUNUSED(X) (void)X
U__HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
[__HAL_LOCK(__HANDLE__) do{ if((__HANDLE__)->Lock == HAL_LOCKED) { return HAL_BUSY; } else { (__HANDLE__)->Lock = HAL_LOCKED;
RCC_CR_HSION RCC_CR_HSION_Msk
<01>
RCC_CR_HSIRDY_Pos (1U)
<01>
RCC_CR_HSIRDY_Msk (0x1UL << RCC_CR_HSIRDY_Pos)
<01>
RCC_CR_HSIRDY RCC_CR_HSIRDY_Msk
<01>
RCC_CR_HSITRIM_Pos (3U)
<01>
RCC_CR_HSITRIM_Msk (0x1FUL << RCC_CR_HSITRIM_Pos)
<01>
RCC_CR_HSITRIM RCC_CR_HSITRIM_Msk
<01>
RCC_CR_HSICAL_Pos (8U)
<01>
RCC_CR_HSICAL_Msk (0xFFUL << RCC_CR_HSICAL_Pos)
<01>
RCC_CR_HSICAL RCC_CR_HSICAL_Msk
<01>
RCC_CR_HSEON_Pos (16U)
<01>
RCC_CR_HSEON_Msk (0x1UL << RCC_CR_HSEON_Pos)
<01>
RCC_CR_HSEON RCC_CR_HSEON_Msk
<01>
RCC_CR_HSERDY_Pos (17U)
<01>
RCC_CR_HSERDY_Msk (0x1UL << RCC_CR_HSERDY_Pos)
<01>
RCC_CR_HSERDY RCC_CR_HSERDY_Msk
<01>
RCC_CR_HSEBYP_Pos (18U)
<01>
RCC_CR_HSEBYP_Msk (0x1UL << RCC_CR_HSEBYP_Pos)
<01>
RCC_CR_HSEBYP RCC_CR_HSEBYP_Msk
<01>
RCC_CR_CSSON_Pos (19U)
<01>
RCC_CR_CSSON_Msk (0x1UL << RCC_CR_CSSON_Pos)
<01>
RCC_CR_CSSON RCC_CR_CSSON_Msk
<01>
RCC_CR_PLLON_Pos (24U)
<01>
RCC_CR_PLLON_Msk (0x1UL << RCC_CR_PLLON_Pos)
<01>
RCC_CR_PLLON RCC_CR_PLLON_Msk
<01>
RCC_CR_PLLRDY_Pos (25U)
<01>
RCC_CR_PLLRDY_Msk (0x1UL << RCC_CR_PLLRDY_Pos)
<01>
RCC_CR_PLLRDY RCC_CR_PLLRDY_Msk
<01>
RCC_CFGR_SW_Pos (0U)
<01>
RCC_CFGR_SW_Msk (0x3UL << RCC_CFGR_SW_Pos)
<01>
RCC_CFGR_SW RCC_CFGR_SW_Msk
<01>
RCC_CFGR_SW_0 (0x1UL << RCC_CFGR_SW_Pos)
<01>
RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos)
<01>
RCC_CFGR_SW_HSI 0x00000000U
<01>
RCC_CFGR_SW_HSE 0x00000001U
<01>
RCC_CFGR_SW_PLL 0x00000002U
<01>
RCC_CFGR_SWS_Pos (2U)
<01>
RCC_CFGR_SWS_Msk (0x3UL << RCC_CFGR_SWS_Pos)
<01>
RCC_CFGR_SWS RCC_CFGR_SWS_Msk
<01>
RCC_CFGR_SWS_0 (0x1UL << RCC_CFGR_SWS_Pos)
<01>
RCC_CFGR_SWS_1 (0x2UL << RCC_CFGR_SWS_Pos)
<01>
RCC_CFGR_SWS_HSI 0x00000000U
<01>
RCC_CFGR_SWS_HSE 0x00000004U
<01>
RCC_CFGR_SWS_PLL 0x00000008U
<01>
RCC_CFGR_HPRE_Pos (4U)
<01>
RCC_CFGR_HPRE_Msk (0xFUL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk
<01>
RCC_CFGR_HPRE_0 (0x1UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_1 (0x2UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_2 (0x4UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_3 (0x8UL << RCC_CFGR_HPRE_Pos)
<01>
RCC_CFGR_HPRE_DIV1 0x00000000U
<01>
RCC_CFGR_HPRE_DIV2 0x00000080U
<01>
RCC_CFGR_HPRE_DIV4 0x00000090U
<01>
RCC_CFGR_HPRE_DIV8 0x000000A0U
<01>
RCC_CFGR_HPRE_DIV16 0x000000B0U
<01>
RCC_CFGR_HPRE_DIV64 0x000000C0U
<01>
RCC_CFGR_HPRE_DIV128 0x000000D0U
<01>
RCC_CFGR_HPRE_DIV256 0x000000E0U
<01>
RCC_CFGR_HPRE_DIV512 0x000000F0U
<01>
RCC_CFGR_PPRE1_Pos (8U)
<01>
RCC_CFGR_PPRE1_Msk (0x7UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk
<01>
RCC_CFGR_PPRE1_0 (0x1UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1_1 (0x2UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1_2 (0x4UL << RCC_CFGR_PPRE1_Pos)
<01>
RCC_CFGR_PPRE1_DIV1 0x00000000U
<01>
RCC_CFGR_PPRE1_DIV2 0x00000400U
<01>
RCC_CFGR_PPRE1_DIV4 0x00000500U
<01>
RCC_CFGR_PPRE1_DIV8 0x00000600U
<01>
RCC_CFGR_PPRE1_DIV16 0x00000700U
<01>
RCC_CFGR_PPRE2_Pos (11U)
<01>
RCC_CFGR_PPRE2_Msk (0x7UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_Msk
<01>
RCC_CFGR_PPRE2_0 (0x1UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2_1 (0x2UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2_2 (0x4UL << RCC_CFGR_PPRE2_Pos)
<01>
RCC_CFGR_PPRE2_DIV1 0x00000000U
<01>
RCC_CFGR_PPRE2_DIV2 0x00002000U
<01>
RCC_CFGR_PPRE2_DIV4 0x00002800U
<01>
RCC_CFGR_PPRE2_DIV8 0x00003000U
<01>
RCC_CFGR_PPRE2_DIV16 0x00003800U
<01>
RCC_CFGR_ADCPRE_Pos (14U)
<01>
RCC_CFGR_ADCPRE_Msk (0x3UL << RCC_CFGR_ADCPRE_Pos)
<01>
RCC_CFGR_ADCPRE RCC_CFGR_ADCPRE_Msk
<01>
RCC_CFGR_ADCPRE_0 (0x1UL << RCC_CFGR_ADCPRE_Pos)
<01>
RCC_CFGR_ADCPRE_1 (0x2UL << RCC_CFGR_ADCPRE_Pos)
<01>
RCC_CFGR_ADCPRE_DIV2 0x00000000U
<01>
RCC_CFGR_ADCPRE_DIV4 0x00004000U
<01>
RCC_CFGR_ADCPRE_DIV6 0x00008000U
<01>
RCC_CFGR_ADCPRE_DIV8 0x0000C000U
<01>
RCC_CFGR_PLLSRC_Pos (16U)
<01>
RCC_CFGR_PLLSRC_Msk (0x1UL << RCC_CFGR_PLLSRC_Pos)
<01>
RCC_CFGR_PLLSRC RCC_CFGR_PLLSRC_Msk
<01>
RCC_CFGR_PLLXTPRE_Pos (17U)
<01>
RCC_CFGR_PLLXTPRE_Msk (0x1UL << RCC_CFGR_PLLXTPRE_Pos)
<01>
RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk
<01>
RCC_CFGR_PLLMULL_Pos (18U)
<01>
RCC_CFGR_PLLMULL_Msk (0xFUL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL RCC_CFGR_PLLMULL_Msk
<01>
RCC_CFGR_PLLMULL_0 (0x1UL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL_1 (0x2UL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL_2 (0x4UL << RCC_CFGR_PLLMULL_Pos)
<01>
RCC_CFGR_PLLMULL_3 (0x8UL << RCC_CFGR_PLLMULL_Pos)
<01>RCC_CFGR_PLLXTPRE_HSE 0x00000000U
<01>RCC_CFGR_PLLXTPRE_HSE_DIV2 0x00020000U
<01>RCC_CFGR_PLLMULL2 0x00000000U
<01>RCC_CFGR_PLLMULL3_Pos (18U)
<01>RCC_CFGR_PLLMULL3_Msk (0x1UL << RCC_CFGR_PLLMULL3_Pos)
<01>RCC_CFGR_PLLMULL3 RCC_CFGR_PLLMULL3_Msk
<01>RCC_CFGR_PLLMULL4_Pos (19U)
<01>RCC_CFGR_PLLMULL4_Msk (0x1UL << RCC_CFGR_PLLMULL4_Pos)
<01>RCC_CFGR_PLLMULL4 RCC_CFGR_PLLMULL4_Msk
<01>RCC_CFGR_PLLMULL5_Pos (18U)
<01>RCC_CFGR_PLLMULL5_Msk (0x3UL << RCC_CFGR_PLLMULL5_Pos)
<01>RCC_CFGR_PLLMULL5 RCC_CFGR_PLLMULL5_Msk
<01>RCC_CFGR_PLLMULL6_Pos (20U)
<01>RCC_CFGR_PLLMULL6_Msk (0x1UL << RCC_CFGR_PLLMULL6_Pos)
<01>RCC_CFGR_PLLMULL6 RCC_CFGR_PLLMULL6_Msk
<01>RCC_CFGR_PLLMULL7_Pos (18U)
<01>RCC_CFGR_PLLMULL7_Msk (0x5UL << RCC_CFGR_PLLMULL7_Pos)
<01>RCC_CFGR_PLLMULL7 RCC_CFGR_PLLMULL7_Msk
<01>RCC_CFGR_PLLMULL8_Pos (19U)
<01>RCC_CFGR_PLLMULL8_Msk (0x3UL << RCC_CFGR_PLLMULL8_Pos)
<01>RCC_CFGR_PLLMULL8 RCC_CFGR_PLLMULL8_Msk
<01>RCC_CFGR_PLLMULL9_Pos (18U)
<01>RCC_CFGR_PLLMULL9_Msk (0x7UL << RCC_CFGR_PLLMULL9_Pos)
<01>RCC_CFGR_PLLMULL9 RCC_CFGR_PLLMULL9_Msk
<01>RCC_CFGR_PLLMULL10_Pos (21U)
<01>RCC_CFGR_PLLMULL10_Msk (0x1UL << RCC_CFGR_PLLMULL10_Pos)
<01>RCC_CFGR_PLLMULL10 RCC_CFGR_PLLMULL10_Msk
<01>RCC_CFGR_PLLMULL11_Pos (18U)
<01>RCC_CFGR_PLLMULL11_Msk (0x9UL << RCC_CFGR_PLLMULL11_Pos)
<01>RCC_CFGR_PLLMULL11 RCC_CFGR_PLLMULL11_Msk
<01>RCC_CFGR_PLLMULL12_Pos (19U)
<01>RCC_CFGR_PLLMULL12_Msk (0x5UL << RCC_CFGR_PLLMULL12_Pos)
<01>RCC_CFGR_PLLMULL12 RCC_CFGR_PLLMULL12_Msk
<01>RCC_CFGR_PLLMULL13_Pos (18U)
<01>RCC_CFGR_PLLMULL13_Msk (0xBUL << RCC_CFGR_PLLMULL13_Pos)
<01>RCC_CFGR_PLLMULL13 RCC_CFGR_PLLMULL13_Msk
<01>RCC_CFGR_PLLMULL14_Pos (20U)
<01>RCC_CFGR_PLLMULL14_Msk (0x3UL << RCC_CFGR_PLLMULL14_Pos)
<01>RCC_CFGR_PLLMULL14 RCC_CFGR_PLLMULL14_Msk
<01>RCC_CFGR_PLLMULL15_Pos (18U)
<01>RCC_CFGR_PLLMULL15_Msk (0xDUL << RCC_CFGR_PLLMULL15_Pos)
<01>RCC_CFGR_PLLMULL15 RCC_CFGR_PLLMULL15_Msk
<01>RCC_CFGR_PLLMULL16_Pos (19U)
<01>RCC_CFGR_PLLMULL16_Msk (0x7UL << RCC_CFGR_PLLMULL16_Pos)
<01>RCC_CFGR_PLLMULL16 RCC_CFGR_PLLMULL16_Msk
<01>RCC_CFGR_USBPRE_Pos (22U)
<01>RCC_CFGR_USBPRE_Msk (0x1UL << RCC_CFGR_USBPRE_Pos)
<01>RCC_CFGR_USBPRE RCC_CFGR_USBPRE_Msk
<01>RCC_CFGR_MCO_Pos (24U)
<01>RCC_CFGR_MCO_Msk (0x7UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO RCC_CFGR_MCO_Msk
<01>RCC_CFGR_MCO_0 (0x1UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO_1 (0x2UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO_2 (0x4UL << RCC_CFGR_MCO_Pos)
<01>RCC_CFGR_MCO_NOCLOCK 0x00000000U
<01>RCC_CFGR_MCO_SYSCLK 0x04000000U
<01>RCC_CFGR_MCO_HSI 0x05000000U
<01>RCC_CFGR_MCO_HSE 0x06000000U
<01>RCC_CFGR_MCO_PLLCLK_DIV2 0x07000000U
<01>RCC_CFGR_MCOSEL RCC_CFGR_MCO
<01>RCC_CFGR_MCOSEL_0 RCC_CFGR_MCO_0
<01>RCC_CFGR_MCOSEL_1 RCC_CFGR_MCO_1
<01>RCC_CFGR_MCOSEL_2 RCC_CFGR_MCO_2
<01>RCC_CFGR_MCOSEL_NOCLOCK RCC_CFGR_MCO_NOCLOCK
<01>RCC_CFGR_MCOSEL_SYSCLK RCC_CFGR_MCO_SYSCLK
<01>RCC_CFGR_MCOSEL_HSI RCC_CFGR_MCO_HSI
<01>RCC_CFGR_MCOSEL_HSE RCC_CFGR_MCO_HSE
<01>RCC_CFGR_MCOSEL_PLL_DIV2 RCC_CFGR_MCO_PLLCLK_DIV2
<01>RCC_CIR_LSIRDYF_Pos (0U)
<01>RCC_CIR_LSIRDYF_Msk (0x1UL << RCC_CIR_LSIRDYF_Pos)
<01>RCC_CIR_LSIRDYF RCC_CIR_LSIRDYF_Msk
<01>RCC_CIR_LSERDYF_Pos (1U)
<01>RCC_CIR_LSERDYF_Msk (0x1UL << RCC_CIR_LSERDYF_Pos)
<01>RCC_CIR_LSERDYF RCC_CIR_LSERDYF_Msk
<01>RCC_CIR_HSIRDYF_Pos (2U)
<01>RCC_CIR_HSIRDYF_Msk (0x1UL << RCC_CIR_HSIRDYF_Pos)
<01>RCC_CIR_HSIRDYF RCC_CIR_HSIRDYF_Msk
<01>RCC_CIR_HSERDYF_Pos (3U)
<01>RCC_CIR_HSERDYF_Msk (0x1UL << RCC_CIR_HSERDYF_Pos)
<01>RCC_CIR_HSERDYF RCC_CIR_HSERDYF_Msk
<01>RCC_CIR_PLLRDYF_Pos (4U)
<01>RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos)
<01>RCC_CIR_PLLRDYF RCC_CIR_PLLRDYF_Msk
<01>RCC_CIR_CSSF_Pos (7U)
<01>RCC_CIR_CSSF_Msk (0x1UL << RCC_CIR_CSSF_Pos)
<01>RCC_CIR_CSSF RCC_CIR_CSSF_Msk
<01>RCC_CIR_LSIRDYIE_Pos (8U)
<01>RCC_CIR_LSIRDYIE_Msk (0x1UL << RCC_CIR_LSIRDYIE_Pos)
<01>RCC_CIR_LSIRDYIE RCC_CIR_LSIRDYIE_Msk
<01>RCC_CIR_LSERDYIE_Pos (9U)
<01>RCC_CIR_LSERDYIE_Msk (0x1UL << RCC_CIR_LSERDYIE_Pos)
<01>RCC_CIR_LSERDYIE RCC_CIR_LSERDYIE_Msk
<01>RCC_CIR_HSIRDYIE_Pos (10U)
<01>RCC_CIR_HSIRDYIE_Msk (0x1UL << RCC_CIR_HSIRDYIE_Pos)
<01>RCC_CIR_HSIRDYIE RCC_CIR_HSIRDYIE_Msk
<01>RCC_CIR_HSERDYIE_Pos (11U)
<01>RCC_CIR_HSERDYIE_






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O# Z# a# q# Dx#T |#` `<00>#<00> $d.realdata$t$dstartup_stm32f103xe.sSTACKStack_Mem__initial_spHEAPHeap_MemRESET.text..\Core\Src\main.c../Core/Src/main.ci.Error_Handleri.SystemClock_Configi.main..\Core\Src\gpio.c../Core/Src/gpio.ci.MX_GPIO_Init..\Core\Src\usart.c../Core/Src/usart.ci.HAL_UART_MspIniti.MX_USART1_UART_Init.bss..\Core\Src\stm32f1xx_it.c../Core/Src/stm32f1xx_it.ci.BusFault_Handleri.DebugMon_Handleri.HardFault_Handleri.MemManage_Handleri.NMI_Handleri.PendSV_Handleri.SVC_Handleri.SysTick_Handleri.UsageFault_Handler..\Core\Src\stm32f1xx_hal_msp.c../Core/Src/stm32f1xx_hal_msp.ci.HAL_MspInit..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.ci.HAL_UART_Initi.UART_SetConfigUART_SetConfig..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.ci.HAL_GetTicki.HAL_IncTicki.HAL_Initi.HAL_InitTick.data..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.ci.HAL_RCC_ClockConfigi.HAL_RCC_GetPCLK1Freqi.HAL_RCC_GetPCLK2Freqi.HAL_RCC_GetSysClockFreqi.HAL_RCC_OscConfig..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.ci.HAL_GPIO_Init..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.ci.HAL_NVIC_SetPriorityi.HAL_NVIC_SetPriorityGroupingi.HAL_SYSTICK_Configi.__NVIC_SetPriority__NVIC_SetPriority..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c..\Core\Src\system_stm32f1xx.c../Core/Src/system_stm32f1xx.ci.SystemInit.constdatabsp_System\\Callback.cppbsp_System\Callback.cppbsp_System\\MainSystem.cppbsp_System\MainSystem.cppi.MainIniti.MainSystemi.__sti___14_MainSystem_cpp_com__sti___14_MainSystem_cpp_com.init_arraybsp_System\\vartable.cppbsp_System\vartable.cppbsp_Device\\bsp_PrintArt.cppbsp_Device\bsp_PrintArt.cppi._ZN12bsp_PrintArtC2Evi._ZN18bsp_PrintArt_STM32C1EP20__UART_HandleTypeDef.constdata__ZTV12bsp_PrintArt.constdata__ZTV18bsp_PrintArt_STM32dc.s../clib/heapalloc.c../clib/heap1.c../clib/heap2.c../clib/longlong.s../clib/printf.c../clib/string.c../clib/memcpset.s../clib/heapaux.c../clib/angel/startup.s!!!main../clib/arm_runtime.c../../../edgfe/lib_src/pure_virt.c../../../edgfe/lib_src/typeinfo.c../clib/angel/sys.s../clib/angel/kernel.s.ARM.Collect$$rtentry$$00000000../clib/angel/rt.s../clib/printf_percent.s../clib/signal.c../clib/armsys.c../clib/libinit.s.ARM.Collect$$libinit$$00000002.ARM.Collect$$libinit$$00000004.ARM.Collect$$libinit$$0000000A.ARM.Collect$$libinit$$0000000C.ARM.Collect$$libinit$$0000000E.ARM.Collect$$libinit$$00000011.ARM.Collect$$libinit$$00000013.ARM.Collect$$l
D:\SOFTWARE\Keil_v5\ARM\ARMCC\Bin\..\lib\armlib\c_w.lD:\SOFTWARE\Keil_v5\ARM\ARMCC\Bin\..\lib\cpplib\cpp_ws.lD:\SOFTWARE\Keil_v5\ARM\ARMCC\Bin\..\lib\cpplib\cpprt_w.lD:\SOFTWARE\Keil_v5\ARM\ARMCC\Bin\..\lib\armlib\fz_ws.lD:\SOFTWARE\Keil_v5\ARM\ARMCC\Bin\..\lib\armlib\h_w.lD:\SOFTWARE\Keil_v5\ARM\ARMCC\Bin\..\lib\armlib\m_ws.lD:\SOFTWARE\Keil_v5\ARM\ARMCC\Bin\..\lib\armlib\vfpsupport.lInput Comments:startup_stm32f103xe.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]ArmAsm --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interwork --depend=template\startup_stm32f103xe.d  -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACmain.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\main.o --vfemode=force
Input Comments:p4dc0-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide main.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\main.o --depend=template\main.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\main.crf ../Core/Src/main.cgpio.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\gpio.o --vfemode=force
Input Comments:p6734-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide gpio.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\gpio.o --depend=template\gpio.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\gpio.crf ../Core/Src/gpio.cusart.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\usart.o --vfemode=force
Input Comments:p3d4c-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide usart.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\usart.o --depend=template\usart.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\usart.crf ../Core/Src/usart.cstm32f1xx_it.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_it.o --vfemode=force
Input Comments:p5d70-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_it.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_it.o --depend=template\stm32f1xx_it.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_it.crf ../Core/Src/stm32f1xx_it.cstm32f1xx_hal_msp.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_msp.o --vfemode=force
Input Comments:p6864-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_msp.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_msp.o --depend=template\stm32f1xx_hal_msp.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_msp.crf ../Core/Src/stm32f1xx_hal_msp.cstm32f1xx_hal_gpio_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_gpio_ex.o --vfemode=force
Input Comments:p2368-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_gpio_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_gpio_ex.o --depend=template\stm32f1xx_hal_gpio_ex.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_gpio_ex.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cstm32f1xx_hal_tim.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_tim.o --vfemode=force
Input Comments:p6964-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_tim.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_tim.o --depend=template\stm32f1xx_hal_tim.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_tim.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cstm32f1xx_hal_tim_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_tim_ex.o --vfemode=force
Input Comments:p57f8-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_tim_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_tim_ex.o --depend=template\stm32f1xx_hal_tim_ex.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_tim_ex.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cstm32f1xx_hal_uart.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_uart.o --vfemode=force
Input Comments:p3444-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_uart.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_uart.o --depend=template\stm32f1xx_hal_uart.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_uart.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cstm32f1xx_hal.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal.o --vfemode=force
Input Comments:p18a0-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal.o --depend=template\stm32f1xx_hal.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cstm32f1xx_hal_rcc.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_rcc.o --vfemode=force
Input Comments:pb78-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_rcc.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_rcc.o --depend=template\stm32f1xx_hal_rcc.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_rcc.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cstm32f1xx_hal_rcc_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_rcc_ex.o --vfemode=force
Input Comments:p6e04-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_rcc_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_rcc_ex.o --depend=template\stm32f1xx_hal_rcc_ex.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_rcc_ex.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cstm32f1xx_hal_gpio.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_gpio.o --vfemode=force
Input Comments:p4e6c-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_gpio.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_gpio.o --depend=template\stm32f1xx_hal_gpio.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_gpio.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cstm32f1xx_hal_dma.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_dma.o --vfemode=force
Input Comments:p4144-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_dma.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_dma.o --depend=template\stm32f1xx_hal_dma.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_dma.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cstm32f1xx_hal_cortex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_cortex.o --vfemode=force
Input Comments:p69a8-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_cortex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_cortex.o --depend=template\stm32f1xx_hal_cortex.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_cortex.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cstm32f1xx_hal_pwr.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_pwr.o --vfemode=force
Input Comments:p4138-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_pwr.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_pwr.o --depend=template\stm32f1xx_hal_pwr.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_pwr.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cstm32f1xx_hal_flash.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_flash.o --vfemode=force
Input Comments:p5ce0-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_flash.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_flash.o --depend=template\stm32f1xx_hal_flash.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_flash.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cstm32f1xx_hal_flash_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_flash_ex.o --vfemode=force
Input Comments:p4600-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_flash_ex.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_flash_ex.o --depend=template\stm32f1xx_hal_flash_ex.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_flash_ex.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cstm32f1xx_hal_exti.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\stm32f1xx_hal_exti.o --vfemode=force
Input Comments:p6820-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide stm32f1xx_hal_exti.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\stm32f1xx_hal_exti.o --depend=template\stm32f1xx_hal_exti.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\stm32f1xx_hal_exti.crf ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.csystem_stm32f1xx.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\system_stm32f1xx.o --vfemode=force
Input Comments:p337c-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide system_stm32f1xx.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --c99 --split_sections --debug -c -otemplate\system_stm32f1xx.o --depend=template\system_stm32f1xx.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\system_stm32f1xx.crf ../Core/Src/system_stm32f1xx.ccallback.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\callback.o --vfemode=force
Input Comments:p6940-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide callback.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --cpp --split_sections --debug -c -otemplate\callback.o --depend=template\callback.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\callback.crf bsp_System\Callback.cppmainsystem.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\mainsystem.o --vfemode=force
Input Comments:p5d58-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide mainsystem.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --cpp --split_sections --debug -c -otemplate\mainsystem.o --depend=template\mainsystem.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\mainsystem.crf bsp_System\MainSystem.cppvartable.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\vartable.o --vfemode=force
Input Comments:p6320-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide vartable.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --cpp --split_sections --debug -c -otemplate\vartable.o --depend=template\vartable.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\vartable.crf bsp_System\vartable.cppbsp_printart.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M3 --fpu=SoftVFP --output=template\bsp_printart.o --vfemode=force
Input Comments:p368-3Component: ARM Compiler 5.06 update 7 (build 960) Tool: armasm [4d35fa]armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M3 --fpu=SoftVFP --apcs=/interwork/interwork --divide bsp_printart.oComponent: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]ArmCC --cpp --split_sections --debug -c -otemplate\bsp_printart.o --depend=template\bsp_printart.d --cpu=Cortex-M3 --apcs=interwork -O3 --diag_suppress=9931 -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I.\bsp_System -I.\bsp_Device -I.\RTE\_template -ID:\SOFTWARE\Keil_v5\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\SOFTWARE\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -D__UVISION_VERSION=537 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -DUSE_HAL_DRIVER -DSTM32F103xE --omf_browse=template\bsp_printart.crf bsp_Device\bsp_PrintArt.cppER_IROM1RW_IRAM1.debug_abbrev.debug_frame.debug_info.debug_line.debug_loc.debug_macinfo.debug_pubnames.symtab.strtab.note.comment.shstrtab
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