pcb_lib/basic_lib/BASIC_OBJ_0.OBK

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Cells


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Parts

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Views
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Library
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Graphics

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Packages

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ExportBlocks

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Cells Directory 
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<01><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><00>Views Directory 
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STM32F103RCT6
,.<00><><EFBFBD><EFBFBD><00>RVT220UF50V67RV0021(<00><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Jq$Types$
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RVT220UF50V67RV0021.Normal
hPo
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2
1^d9K(<06><><EFBFBD><EFBFBD>\9STM32F103RCT6A
STM32F103RCT6A.Normal
<18><18>x/<00><>\9STM32F103RCT6A.Normal0
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UK(<06><><EFBFBD><EFBFBD>\9STM32F103RCT6B
STM32F103RCT6B.Normal
kSx/<00><>\9STM32F103RCT6B.Normal0
(((<00><00>
<00><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\9<00><00>	A<00><>\9PC14-OSC32IN
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UK(<06><><EFBFBD><EFBFBD>\9STM32F103RCT6C
STM32F103RCT6C.Normal
<18><18>x/<00><>\9STM32F103RCT6C.Normal0
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 <1A>reC<00><>\9PA10-USART1_RX<00><><EFBFBD><EFBFBD> <1A>reB<00><>\9
PA2-USART2_TX(<00><><EFBFBD><EFBFBD>( <1A>reB<00><>\9
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UK(<06><><EFBFBD><EFBFBD>\9STM32F103RCT6D
STM32F103RCT6D.Normal
<18>	<18>	x/<00><>\9STM32F103RCT6D.Normal0
(((n

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STM32F103RCT6
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ASTM32F103RCT6A
112131819313247486364 \  <20><><EFBFBD><EFBFBD>\9
BSTM32F103RCT6B	
3
4
5
6
760284649 g  <20><><EFBFBD><EFBFBD>\9
CSTM32F103RCT6C
51525354424316172930 <20>  <20><><EFBFBD><EFBFBD>\9
DSTM32F103RCT6D"
2
8
910111415202122232425262755565758596162333435363738394041444550<00><>\9**0<00><><EFBFBD><EFBFBD>

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I'<06><><EFBFBD><EFBFBD>\9
L-l12_3-w12_3
L-l12_3-w12_3.Normal
.<00><>\9L-l12_3-w12_3.Normal0**0<00><><EFBFBD><EFBFBD>
<00><>\9**0<00><><EFBFBD><EFBFBD>

<00><>\9**0<00><><EFBFBD><EFBFBD>

<00><>\9**0<00><><EFBFBD><EFBFBD>
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0
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0

L<1F>'<00><>\9
L-l12_3-w12_3
Lsmd-l12_3-w12_3
 3  <20><><EFBFBD><EFBFBD>\9
L-l12_3-w12_3
1
2
CONN-TH-2P-P5
 3  <20><><EFBFBD><EFBFBD>\9
I'<06><><EFBFBD><EFBFBD>\9
CONN-TH-2P-P5
CONN-TH-2P-P5.Normal
p
X
w.<00><>\9CONN-TH-2P-P5.Normal0
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CONN-TH-2P-P5
1
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WH-LTE-7S1
WH-LTE-7S1.Normal
s[t+<00><>\9WH-LTE-7S1.Normal0
(((<<
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RXD<(Z( 6|S8<00><>\9GND2<00><><EFBFBD><EFBFBD>2 6|S8<00><>\9GND(<00><><EFBFBD><EFBFBD>( 6|S7<00><>\9DC<00><><EFBFBD><EFBFBD> 6|S7<00><>\9DC
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U
WH-LTE-7S1
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WH-LTE-7S1
6
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A#<06><><EFBFBD><EFBFBD>\9	XML-DEBUG
XML-DEBUG.Normal
v^s*<00><>\9XML-DEBUG.Normal0
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8<00><>\93V3
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1
2
3
4
5
6
7
8
910HO2
?"<06><><EFBFBD><EFBFBD>\9UCC27710
UCC27710.Normal
<18><18>r)<00><>\9UCC27710.Normal0
(((22
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U<1F>"<00><>\9UCC27710
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 L  <20><><EFBFBD><EFBFBD>\9UCC27710
1
2
3
4
8
7
6
5'"''<27><><EFBFBD><EFBFBD>\9

?"<06><><EFBFBD><EFBFBD>\9UCC27517
UCC27517.Normal
2r)<00><>\9UCC27517.Normal0
(((<<
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U<1F>"<00><>\9UCC27517
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1
2
3
4
59TS-POINT

1<00><>\9
?"<06><><EFBFBD><EFBFBD>\9TS-POINT
TS-POINT.Normal
^
F
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1


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1PHF
d

=!<06><><EFBFBD><EFBFBD>\9TPS5430
TPS5430.Normal
gO<18>(<00><>\9TPS5430.Normal0(((F<
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d
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U
SOIC_8_GND
 P  <20><><EFBFBD><EFBFBD>\9TPS5430	
1
2
3
4
8
7
6
5
9'<27><><EFBFBD><EFBFBD>\9&0
?"<06><><EFBFBD><EFBFBD>\9SGM8634B
SGM8634B.Normal
<18>
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A2P 6<00><>\9
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SGM8634C.Normal
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SGM8634D.Normal
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U?"<06><><EFBFBD><EFBFBD>\9SGM8634E
SGM8634E.Normal
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o
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ASGM8634A
411 4  <20><><EFBFBD><EFBFBD>\9
BSGM8634B
1
2
3 4  <20><><EFBFBD><EFBFBD>\9
CSGM8634C
7
6
5 5  <20><><EFBFBD><EFBFBD>\9
DSGM8634D
8
910 7  <20><><EFBFBD><EFBFBD>\9
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J
K
L
M
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=!<06><><EFBFBD><EFBFBD>\9ESP-01S
ESP-01S.Normal
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U<1F>!<00><>\9ESP-01S
UESP-01S
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1
2
3
4
5
6
7
8		<00><>\9
=!<06><><EFBFBD><EFBFBD>\9AOD2610
AOD2610.Normal
eM-(<00><>\9AOD2610.Normal0)) #-<00><>\9)) 


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QTO252
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3
1
2DN1<
; <06><><EFBFBD><EFBFBD>\9TYPE-C

TYPE-C.Normal
<18><18>p'<00><>\9
TYPE-C.Normal0
(((dd
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U<1F> <00><>\9TYPE-C
UTYPE-C
 a  <20><><EFBFBD><EFBFBD>\9TYPE-C
1
2
3
4
5
6
7
8
9101112

; <06><><EFBFBD><EFBFBD>\9switch

switch.Normal
<18><18><18>
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switch.Normal0
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1
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K<1F> <00><>\9switch
Ksw-smd_l6_0-w3_7-ls8_0
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1
2 <1A><><EFBFBD>6<00><>\9
A2P
; <06><><EFBFBD><EFBFBD>\9SP3485

SP3485.Normal
<18><18>p'<00><>\9
SP3485.Normal0
(((22
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<00><><EFBFBD><EFBFBD>
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U<1F> <00><>\9SP3485
USOP-8
 J  <20><><EFBFBD><EFBFBD>\9SP3485
1
2
3
4
5
6
7
8'<27><><EFBFBD><EFBFBD>\960L

U
; <06><><EFBFBD><EFBFBD>\9LM1117

LM1117.Normal
<18>
<18>
p'<00><>\9
LM1117.Normal0
(((2
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U{ <00><>\9LM1117
Usot-223
 6  <20><><EFBFBD><EFBFBD>\9LM1117
1
2
3
4<00><>\9ANODE
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; <06><><EFBFBD><EFBFBD>\9DSK110

DSK110.Normal
<18><18><18>
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D<1F> <00><>\9DSK110
Dsod-123fl_l2d8-w1d8-ls3d7-rd-1
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2
1Z
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CH340N.Normal
<18><18>p'<00><>\9
CH340N.Normal0
(((<2
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1
2
3
4
5
6
7
8ANODE
<00><><EFBFBD><EFBFBD>
 8/<1A><>P

9<06><><EFBFBD><EFBFBD>\9SS310
SS310.Normal
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D
sma-l4_5-w2_7
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2
1D
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9<06><><EFBFBD><EFBFBD>\9S8550
S8550.Normal
zb
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Qv<00><>\9S8550
Q	sot-23-3p
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1
3
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9<06><><EFBFBD><EFBFBD>\9S8050
S8050.Normal
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1
3
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D~
9<06><><EFBFBD><EFBFBD>\9RS5MC
RS5MC.Normal
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Dsmc_l6d9-w5d9-ls7d9-rd
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2
1
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9<06><><EFBFBD><EFBFBD>\9R2512
R2512.Normal
29
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Ur2512
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1
2
9<06><><EFBFBD><EFBFBD>\9R0603
R0603.Normal
29
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1
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9<06><><EFBFBD><EFBFBD>\9C0603
C0603.Normal
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1

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C0603
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1
2<00><>\9VSSd<<00>
7<06><><EFBFBD><EFBFBD>\98MHz
8MHz.Normal
18
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1
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Xn<00><>\98MHz
Xsmd_5032
 *  <20><><EFBFBD><EFBFBD>\98MHz
1
2
3<06><><EFBFBD><EFBFBD>\9TF
	TF.Normal
>&l#<00><>\9	TF.Normal0
(((dZ
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9<00><>\9DAT2d
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 6|S<<00><>\9CD/DAT3d<00> 6|S8<00><>\9CMDd<00> 8<00><>\9VDDd(<00>( 6|S8<00><>\9CLKd2<00>2 6|S8<00><>\9VSSd<<00>< 6|S9<00><>\9DAT0dF<00>F 6|S9<00><>\9DAT1dP<00>P 6|S7<00><>\9CDP<00><><EFBFBD><EFBFBD>P 9<00><>\9GND1(<00><><EFBFBD><EFBFBD>( 9<00><>\9GND2<00><><EFBFBD><EFBFBD> 9<00><>\9GND3<00><><EFBFBD><EFBFBD> 6|S9<00><>\9GND4
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UTF
 c  <20><><EFBFBD><EFBFBD>\9TF

1
2
3
4
5
6
7
8
910111213
3<06><><EFBFBD><EFBFBD>\9M3
	M3.Normal
<18>
<18>
<18>#<00><>\9	M3.Normal0)) 

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