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XerolySkinner
2024-08-21 17:35:29 +08:00
parent dce0e46eed
commit 1b63732e80
88 changed files with 229519 additions and 1191 deletions
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@@ -1,34 +1,385 @@
\t (00:00:02) allegro 17.4 S035 Windows SPB 64-bit Edition \t (00:00:02) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:02) Journal start - Fri Aug 2 06:02:52 2024 \t (00:00:02) Journal start - Sat Aug 3 22:01:08 2024
\t (00:00:02) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=12676 CPUs=12 \t (00:00:02) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=12692 CPUs=12
\t (00:00:02) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\chip\sop-16.dra \t (00:00:02) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\chip\ssop-4.dra
\t (00:00:02) \t (00:00:02)
(00:00:02) Loading axlcore.cxt (00:00:02) Loading axlcore.cxt
\t (00:00:02) Opening existing design... \t (00:00:02) Opening existing design...
\i (00:00:02) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "sop-16" \i (00:00:02) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "ssop-4"
\d (00:00:02) Design opened: D:/workspace/GitHub/pcb_lib/chip/sop-16.dra \d (00:00:02) Design opened: D:/workspace/GitHub/pcb_lib/chip/ssop-4.dra
\t (00:00:02) Grids are drawn 0.040, 0.040 apart for enhanced viewing. \i (00:00:02) trapsize 106
\i (00:00:02) trapsize 43 \i (00:00:02) trapsize 109
\i (00:00:02) trapsize 44 \i (00:00:02) trapsize 106
\i (00:00:03) trapsize 43 \i (00:00:02) trapsize 93
\i (00:00:03) trapsize 38 \i (00:00:03) trapsize 95
\i (00:00:03) trapsize 39 \i (00:00:03) trapsize 98
\i (00:00:03) trapsize 40 \i (00:00:03) trapsize 98
\t (00:00:03) Grids are drawn 0.040, 0.040 apart for enhanced viewing. \i (00:00:05) delete
\i (00:00:03) trapsize 41 \i (00:00:06) drag_start grid -5.518 4.094
\i (00:00:06) step pkg map \i (00:00:07) drag_stop 4.838 -4.300
\i (00:00:06) fillin yes \i (00:00:07) pick grid 4.838 -4.300
\i (00:00:12) setwindow form.pkgmap3d \t (00:00:07) last pick: 4.800 -4.300
\i (00:00:12) FORM pkgmap3d stplist SOP-16.STEP \i (00:00:08) prepopup -0.105 -0.358
\i (00:00:15) FORM pkgmap3d overlay YES \i (00:00:09) done
\i (00:00:16) FORM pkgmap3d hide_board YES \i (00:00:12) param in
\i (00:00:17) FORM pkgmap3d hide_board NO \i (00:00:13) setwindow form.parm_in
\i (00:00:20) FORM pkgmap3d view_orientation Top \i (00:00:13) FORM parm_in browse
\i (00:00:23) FORM pkgmap3d save_current \i (00:00:15) fillin "D:/workspace/GitHub/pcb_lib/XerolySkinner.prm"
\i (00:00:24) FORM pkgmap3d done \i (00:00:16) FORM parm_in execute
\i (00:00:27) setwindow pcb \t (00:00:16) Starting Importing parameter file...
\i (00:00:27) save \w (00:00:17) WARNING(SPMHGE-269): param in had warnings, use Viewlog to review the log file.
\i (00:00:27) fillin yes \t (00:00:17) Opening existing design...
\t (00:00:27) Symbol 'sop-16.psm' created. \i (00:00:17) setwindow pcb
\i (00:00:28) exit \i (00:00:17) trapsize 98
\t (00:00:28) Journal end - Fri Aug 2 06:03:18 2024 \i (00:00:17) trapsize 100
\i (00:00:17) trapsize 98
\t (00:00:17) Grids are drawn 51.200, 51.200 apart for enhanced viewing.
\i (00:00:17) trapsize 98
\i (00:00:19) setwindow text
\i (00:00:19) close
\i (00:00:20) setwindow form.parm_in
\i (00:00:20) FORM parm_in cancel
\i (00:00:21) setwindow pcb
\i (00:00:21) zoom out 1
\i (00:00:21) setwindow pcb
\i (00:00:21) zoom out 0.091 -0.142
\i (00:00:21) trapsize 98
\i (00:00:21) zoom out 1
\i (00:00:21) setwindow pcb
\i (00:00:21) zoom out 0.091 -0.142
\i (00:00:21) trapsize 98
\i (00:00:21) zoom out 1
\i (00:00:21) setwindow pcb
\i (00:00:21) zoom out 0.091 -0.142
\i (00:00:21) trapsize 98
\i (00:00:22) add pin
\i (00:00:29) setwindow form.mini
\i (00:00:29) FORM mini pad_name ssop-4
\w (00:00:29) WARNING(SPMHUT-48): Scaled value has been rounded off.
\t (00:00:29) Using 'SSOP-4.pad'.
\i (00:00:31) setwindow pcb
\i (00:00:31) zoom out 1
\i (00:00:31) setwindow pcb
\i (00:00:31) zoom out 0.444 0.054
\i (00:00:31) trapsize 98
\i (00:00:31) zoom out 1
\i (00:00:31) setwindow pcb
\i (00:00:31) zoom out 0.444 0.054
\i (00:00:31) trapsize 98
\i (00:00:31) zoom out 1
\i (00:00:31) setwindow pcb
\i (00:00:31) zoom out 0.444 0.054
\i (00:00:31) trapsize 98
\i (00:00:31) zoom in 1
\i (00:00:31) setwindow pcb
\i (00:00:31) zoom in 0.444 0.054
\i (00:00:31) trapsize 49
\i (00:00:31) zoom in 1
\i (00:00:31) setwindow pcb
\i (00:00:31) zoom in 0.444 0.054
\i (00:00:31) trapsize 25
\i (00:00:32) zoom in 1
\i (00:00:32) setwindow pcb
\i (00:00:32) zoom in 0.444 0.055
\i (00:00:32) trapsize 12
\i (00:00:32) zoom in 1
\i (00:00:32) setwindow pcb
\i (00:00:32) zoom in 0.444 0.055
\i (00:00:32) trapsize 6
\i (00:00:32) zoom out 1
\i (00:00:32) setwindow pcb
\i (00:00:32) zoom out 0.444 0.055
\i (00:00:32) trapsize 12
\i (00:00:32) zoom out 1
\i (00:00:32) setwindow pcb
\i (00:00:32) zoom out 0.444 0.056
\i (00:00:32) trapsize 25
\i (00:00:42) setwindow form.mini
\i (00:00:42) FORM mini x_count 2
\i (00:00:45) FORM mini x_spacing 1.270
\i (00:00:47) FORM mini y_count 2
\i (00:00:48) FORM mini y_spacing 1.270
\i (00:00:53) FORM mini rotate_pin 0.000
\t (00:00:53) Using 'SSOP-4.pad'.
\i (00:01:08) FORM mini x_spacing 6.500
\i (00:01:30) setwindow pcb
\i (00:01:30) pick -3.25 -0.635
\t (00:01:30) last pick: -3.250 -0.635
\t (00:01:30) Using 'SSOP-4.pad'.
\i (00:01:32) prepopup 2.425 0.370
\i (00:01:33) oops
\t (00:01:33) Using 'SSOP-4.pad'.
\i (00:01:35) setwindow form.mini
\i (00:01:35) FORM mini y_direction Up
\i (00:01:38) FORM mini next_pin_number 1
\i (00:01:39) FORM mini text_name pin
\i (00:01:51) setwindow pcb
\i (00:01:51) pick -3.25 -0.635
\t (00:01:51) last pick: -3.250 -0.635
\t (00:01:51) Using 'SSOP-4.pad'.
\i (00:01:52) zoom out 1
\i (00:01:52) setwindow pcb
\i (00:01:52) zoom out 0.547 -1.155
\i (00:01:52) trapsize 49
\i (00:01:52) zoom out 1
\i (00:01:52) setwindow pcb
\i (00:01:52) zoom out 0.547 -1.156
\i (00:01:52) trapsize 98
\i (00:01:52) zoom out 1
\i (00:01:52) setwindow pcb
\i (00:01:52) zoom out 0.856 -4.790
\i (00:01:52) trapsize 98
\i (00:01:53) zoom in 1
\i (00:01:53) setwindow pcb
\i (00:01:53) zoom in -0.026 0.211
\i (00:01:53) trapsize 49
\i (00:01:53) zoom in 1
\i (00:01:53) setwindow pcb
\i (00:01:53) zoom in -0.026 0.212
\i (00:01:53) trapsize 25
\i (00:01:53) zoom in 1
\i (00:01:53) setwindow pcb
\i (00:01:53) zoom in -0.027 0.212
\i (00:01:53) trapsize 12
\i (00:01:54) zoom out 1
\i (00:01:54) setwindow pcb
\i (00:01:54) zoom out 0.024 -0.511
\i (00:01:54) trapsize 25
\i (00:01:54) zoom out 1
\i (00:01:54) setwindow pcb
\i (00:01:54) zoom out 0.025 -0.510
\i (00:01:54) trapsize 49
\i (00:01:54) prepopup 0.026 -0.511
\i (00:01:55) done
\t (00:01:55) Exiting from Add Pin.
\i (00:02:13) text edit
\i (00:02:15) pick grid -3.378 1.000
\t (00:02:15) last pick: -3.400 1.000
\i (00:02:16) setwindow pcb
\i (00:02:16) pick grid -3.358 -0.383
\t (00:02:16) last pick: -3.400 -0.400
\i (00:02:16) setwindow pcb
\i (00:02:16) pick -3.378 1.000
\t (00:02:16) Pick text to edit.
\i (00:02:19) setwindow pcb
\i (00:02:19) pick grid 3.145 -0.472
\t (00:02:19) last pick: 3.100 -0.500
\i (00:02:19) setwindow pcb
\i (00:02:19) pick -3.358 -0.383
\t (00:02:19) Pick text to edit.
\i (00:02:20) setwindow pcb
\i (00:02:20) pick grid 3.164 0.901
\t (00:02:20) last pick: 3.200 0.900
\i (00:02:20) setwindow pcb
\i (00:02:20) pick 3.145 -0.472
\t (00:02:20) Pick text to edit.
\i (00:02:21) setwindow pcb
\i (00:02:21) prepopup 4.106 1.500
\i (00:02:22) done
\i (00:02:22) setwindow pcb
\i (00:02:22) pick 3.164 0.901
\i (00:02:25) setwindow pcb
\i (00:02:25) add rect
\i (00:02:34) add rect
\i (00:02:37) setwindow form.mini
\i (00:02:37) FORM mini class 'PACKAGE GEOMETRY'
\i (00:03:07) setwindow pcb
\i (00:03:07) pick -2. 2 -1.35
\t (00:03:07) last pick: -2.000 2.000
\i (00:03:23) pick 2.2 -1.35
\t (00:03:23) last pick: 2.200 -1.350
\i (00:03:32) prepopup 3.753 2.696
\i (00:03:33) oops
\t (00:03:33) last pick: -2.000 2.000
\i (00:03:33) prepopup 2.605 2.628
\i (00:03:34) oops
\i (00:03:38) pick -2.2 1.25
\t (00:03:38) last pick: -2.200 1.250
\i (00:03:47) prepopup 2.782 1.313
\i (00:03:48) oops
\i (00:03:52) add rect
\i (00:03:56) pick x -2.2 1.35
\t (00:03:56) last pick: -2.200 1.350
\i (00:04:00) pick 2.2 -1.35
\t (00:04:00) last pick: 2.200 -1.350
\i (00:04:01) pick grid 1.399 3.079
\t (00:04:01) last pick: 1.400 3.100
\i (00:04:01) prepopup 1.879 2.883
\i (00:04:03) oops
\t (00:04:03) last pick: 2.200 -1.350
\i (00:04:03) prepopup 0.408 2.873
\i (00:04:04) done
\i (00:04:08) shape add rect
\i (00:04:11) setwindow form.mini
\i (00:04:11) FORM mini subclass PLACE_BOUND_TOP
\i (00:04:11) setwindow pcb
\i (00:04:11) updateport CVPane
\i (00:04:12) zoom in 1
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom in -0.474 0.774
\i (00:04:12) trapsize 25
\i (00:04:12) zoom in 1
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom in -0.474 0.774
\i (00:04:12) trapsize 12
\i (00:04:12) zoom out 1
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom out -0.474 0.774
\i (00:04:12) trapsize 25
\i (00:04:12) zoom out 1
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom out -0.473 0.775
\i (00:04:12) trapsize 49
\i (00:04:15) pick grid -3.601 1.422
\t (00:04:15) last pick: -3.600 1.400
\i (00:04:19) pick grid 3.559 -1.383
\t (00:04:19) last pick: 3.600 -1.400
\i (00:04:19) prepopup 4.265 1.766
\i (00:04:20) done
\i (00:04:24) add rect
\i (00:04:27) add line
\i (00:04:34) setwindow form.mini
\i (00:04:34) FORM mini subclass SILKSCREEN_TOP
\i (00:04:34) setwindow pcb
\i (00:04:34) updateport CVPane
\i (00:04:36) setwindow form.mini
\i (00:04:36) FORM mini line_width 0.150
\i (00:04:40) setwindow pcb
\i (00:04:40) pick 2.2 1.35
\t (00:04:40) last pick: 2.200 1.350
\i (00:04:45) ipick -4.4
\t (00:04:45) last pick: -2.200 1.350
\i (00:04:48) ipick 0 -2.7
\t (00:04:48) last pick: -2.200 -1.350
\i (00:04:50) ipick 4.4
\t (00:04:50) last pick: 2.200 -1.350
\i (00:04:52) ipick 0 2.7
\t (00:04:52) last pick: 2.200 1.350
\i (00:04:53) prepopup 0.783 2.629
\i (00:04:54) done
\i (00:04:57) shape add rect
\i (00:04:59) pick 0 0
\t (00:04:59) last pick: 0.000 0.000
\i (00:05:06) pick -1.1 1.35
\t (00:05:06) last pick: -1.100 1.350
\i (00:05:07) prepopup 2.980 2.844
\i (00:05:08) oops
\t (00:05:08) last pick: 0.000 0.000
\i (00:05:14) pick -2.2 1.35
\t (00:05:14) last pick: -2.200 1.350
\i (00:05:15) prepopup -0.149 2.913
\i (00:05:15) done
\i (00:05:16) save
\i (00:05:16) fillin yes
\e (00:05:17) ERROR(SPMHGE-7): Error(s) occurred, check logfile.
\i (00:05:18) setwindow text
\i (00:05:18) close
\i (00:05:19) setwindow pcb
\i (00:05:19) label refdes
\t (00:05:19) Pick text location.
\i (00:05:23) setwindow form.mini
\i (00:05:23) FORM mini text_name asm
\i (00:05:24) setwindow pcb
\i (00:05:24) pick 0 0
\t (00:05:24) last pick: 0.000 0.000
\t (00:05:24) Enter text string.
\i (00:05:25) setwindow pcb
\i (00:05:25) pick 0.000 0.000
\i (00:05:26) setwindow pcb
\i (00:05:26) prepopup 4.078 3.158
\i (00:05:27) done
\i (00:05:28) label refdes
\t (00:05:28) Pick text location.
\i (00:05:30) setwindow form.mini
\i (00:05:30) FORM mini subclass SILKSCREEN_TOP
\i (00:05:30) setwindow pcb
\i (00:05:30) updateport CVPane
\i (00:05:34) setwindow form.mini
\i (00:05:34) FORM mini text_name ski
\i (00:05:36) setwindow pcb
\i (00:05:36) pick grid 0.459 -1.098
\t (00:05:36) last pick: 0.500 -1.100
\t (00:05:36) Enter text string.
\i (00:05:37) setwindow pcb
\i (00:05:37) pick 0.500 -1.100
\i (00:05:38) prepopup 0.459 -1.098
\i (00:05:38) done
\i (00:05:41) step pkg map
\i (00:05:42) fillin yes
\i (00:05:51) setwindow form.pkgmap3d
\i (00:05:51) FORM pkgmap3d stplist ssop-4.STEP
\i (00:05:55) FORM pkgmap3d offset_y 90
\i (00:05:56) FORM pkgmap3d offset_y 0
\i (00:05:58) FORM pkgmap3d rotation_y 90
\i (00:05:59) FORM pkgmap3d rotation_y 0
\i (00:05:59) FORM pkgmap3d rotation_x 90
\i (00:06:01) FORM pkgmap3d rotation_x 0
\i (00:06:01) FORM pkgmap3d rotation_z 90
\i (00:06:11) FORM pkgmap3d view_orientation Left
\i (00:06:13) FORM pkgmap3d save_current
\i (00:06:14) FORM pkgmap3d done
\i (00:06:40) setwindow pcb
\i (00:06:40) replace padstack
\i (00:06:41) pick grid -3.307 0.608
\t (00:06:41) last pick: -3.300 0.600
\i (00:06:46) setwindow form.mini
\i (00:06:46) FORM mini newname SSOP-4
\w (00:06:46) WARNING(SPMHUT-48): Scaled value has been rounded off.
\i (00:06:49) FORM mini replace
\t (00:06:49) Done, updated padstack.
\t (00:06:49) 4 out of 4 old padstack SSOP-4 were replaced with new padstack SSOP-4.
\i (00:06:50) setwindow pcb
\i (00:06:50) prepopup 1.048 3.521
\i (00:06:50) done
\t (00:06:50) Performing DRC...
\t (00:06:50) No DRC errors detected.
\i (00:06:51) save
\i (00:06:51) fillin yes
\t (00:06:52) Symbol 'ssop-4.psm' created.
\i (00:06:55) define grid
\t (00:06:55) Spacing fields allow simple equations to aid calculations; prefix with =
\i (00:06:58) setwindow form.grid
\i (00:06:58) FORM grid done
\i (00:07:03) setwindow pcb
\i (00:07:03) shape select
\i (00:07:05) pick grid -3.434 1.432
\t (00:07:05) last pick: -3.400 1.400
\i (00:07:07) drag_start grid -3.542 0.294
\i (00:07:07) drag_stop grid -3.797 0.265
\i (00:07:09) drag_start grid -3.542 0.255
\i (00:07:09) drag_stop grid -3.778 0.294
\i (00:07:12) pick grid -3.552 0.236
\t (00:07:12) last pick: -3.600 0.200
\t (00:07:12) last pick: -3.600 0.236
\i (00:07:12) prepopup -3.552 0.236
\i (00:07:13) prepopup -3.582 0.255
\i (00:07:14) oops
\t (00:07:14) last pick: -3.400 1.400
\i (00:07:15) drag_start grid -3.572 0.265
\t (00:07:15) last pick: -3.600 0.265
\i (00:07:17) drag_stop grid -3.817 0.265
\t (00:07:17) No DRC errors detected.
\i (00:07:19) drag_start grid 3.588 0.294
\t (00:07:19) last pick: 3.600 0.294
\i (00:07:19) drag_stop grid 3.833 0.285
\t (00:07:19) No DRC errors detected.
\i (00:07:20) prepopup 4.304 0.392
\i (00:07:21) done
\i (00:07:21) save
\i (00:07:22) fillin yes
\t (00:07:22) Symbol 'ssop-4.psm' created.
\i (00:07:24) step pkg map
\i (00:07:25) fillin yes
\i (00:07:28) setwindow form.pkgmap3d
\i (00:07:28) FORM pkgmap3d view_orientation Top
\i (00:07:30) FORM pkgmap3d report
\i (00:07:33) setwindow text
\i (00:07:33) close
\i (00:07:34) setwindow form.pkgmap3d
\i (00:07:34) FORM pkgmap3d done
\i (00:07:35) setwindow pcb
\i (00:07:35) save
\i (00:07:36) fillin yes
\t (00:07:36) Symbol 'ssop-4.psm' created.
\i (00:07:47) exit
\t (00:07:48) Journal end - Sat Aug 3 22:08:54 2024

6
chip/batch_drc.log
View File

@@ -2,9 +2,9 @@
( ) ( )
( DRC Update ) ( DRC Update )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : sym_template.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:07:56 2024 ) ( Date/Time : Wed Aug 7 01:08:43 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
@@ -20,7 +20,7 @@
========= check standalone text 0:00:00 ========= check standalone text 0:00:00
========= check standalone rectangles 0:00:00 ========= check standalone rectangles 0:00:00
..... Total number of DRC errors 0 ..... Total number of DRC errors 156
..... DRC update completed, total CPU time 0:00:00 ..... DRC update completed, total CPU time 0:00:00
************************************************************************* *************************************************************************

2
chip/batch_drc.log,1
View File

@@ -4,7 +4,7 @@
( ) ( )
( Drawing : sym_template.dra ) ( Drawing : sym_template.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 04:40:21 2024 ) ( Date/Time : Fri Aug 2 04:40:22 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

4
chip/batch_drc.log,2
View File

@@ -2,9 +2,9 @@
( ) ( )
( DRC Update ) ( DRC Update )
( ) ( )
( Drawing : sym_template.dra ) ( Drawing : ssop-4.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 04:40:22 2024 ) ( Date/Time : Sat Aug 3 22:07:56 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

27
chip/batch_drc.log,3 Normal file
View File

@@ -0,0 +1,27 @@
(---------------------------------------------------------------------)
( )
( DRC Update )
( )
( Drawing : sym_template.dra )
( Software Version : 17.4S035 )
( Date/Time : Wed Aug 7 01:08:42 2024 )
( )
(---------------------------------------------------------------------)
========= check shapes 0:00:00
========= check standalone pins 0:00:00
========= check symbols (pins,lines,text) 0:00:00
========= check xnets 0:00:00
========= check nets 0:00:00
========= check standalone branches 0:00:00
========= check standalone filled rectangles 0:00:00
========= check standalone lines 0:00:00
========= check standalone text 0:00:00
========= check standalone rectangles 0:00:00
..... Total number of DRC errors 0
..... DRC update completed, total CPU time 0:00:00
*************************************************************************

4
chip/downrev.log
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:08:42 2024 ) ( Date/Time : Wed Aug 7 01:16:14 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

4
chip/downrev.log,1
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:08:28 2024 ) ( Date/Time : Wed Aug 7 01:14:18 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

4
chip/downrev.log,2
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:08:42 2024 ) ( Date/Time : Wed Aug 7 01:16:14 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

4
chip/downrev.log,3
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:08:42 2024 ) ( Date/Time : Wed Aug 7 01:16:14 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

BIN
chip/htssop-56-1.pad Normal file
View File

Binary file not shown.

BIN
chip/htssop-56.dra Normal file
View File

Binary file not shown.

6
chip/ssop-4.log → chip/htssop-56.log
View File

@@ -2,16 +2,16 @@
( ) ( )
( CREATE SYMBOL ) ( CREATE SYMBOL )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:08:42 2024 ) ( Date/Time : Wed Aug 7 01:16:14 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Create Symbol of type: PACKAGE Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/chip Directory = D:/workspace/GitHub/pcb_lib/chip
Name = ssop-4.psm Name = htssop-56.psm
User = XerolySkinner User = XerolySkinner
Machine = LAPTOP-XEROLYSK Machine = LAPTOP-XEROLYSK

7
chip/ssop-4.log,3 → chip/htssop-56.log,1
View File

@@ -2,22 +2,23 @@
( ) ( )
( CREATE SYMBOL ) ( CREATE SYMBOL )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:08:28 2024 ) ( Date/Time : Wed Aug 7 01:08:43 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Create Symbol of type: PACKAGE Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/chip Directory = D:/workspace/GitHub/pcb_lib/chip
Name = ssop-4.psm Name = htssop-56.psm
User = XerolySkinner User = XerolySkinner
Machine = LAPTOP-XEROLYSK Machine = LAPTOP-XEROLYSK
Create symbol started. Create symbol started.
WARNING(SPMHA1-301): Create symbol DRC errors exist.
Create symbol completed. Create symbol completed.

6
chip/sop-16.log → chip/htssop-56.log,2
View File

@@ -2,16 +2,16 @@
( ) ( )
( CREATE SYMBOL ) ( CREATE SYMBOL )
( ) ( )
( Drawing : sop-16.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 06:03:17 2024 ) ( Date/Time : Wed Aug 7 01:14:18 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Create Symbol of type: PACKAGE Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/chip Directory = D:/workspace/GitHub/pcb_lib/chip
Name = sop-16.psm Name = htssop-56.psm
User = XerolySkinner User = XerolySkinner
Machine = LAPTOP-XEROLYSK Machine = LAPTOP-XEROLYSK

BIN
chip/htssop-56.pad Normal file
View File

Binary file not shown.

BIN
chip/htssop-56.psm Normal file
View File

Binary file not shown.

2
chip/master.tag
View File

@@ -1 +1 @@
ssop-4.dra htssop-56.dra

24
chip/padstack_editor.jrl
View File

@@ -1,20 +1,8 @@
\t (00:00:01) padstack_editor 17.4 S035 Windows SPB 64-bit Edition \t (00:00:01) padstack_editor 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:01) Journal start - Sat Aug 3 22:07:28 2024 \t (00:00:01) Journal start - Wed Aug 7 01:05:16 2024
\t (00:00:01) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=16304 CPUs=12 \t (00:00:01) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=10064 CPUs=12
\t (00:00:01) CmdLine= d:\software\cadence\spb_17.4\tools\bin\padstack_editor.exe D:\workspace\GitHub\pcb_lib\chip\ssop-4.pad \t (00:00:01) CmdLine= d:\software\cadence\spb_17.4\tools\bin\padstack_editor.exe D:\workspace\GitHub\pcb_lib\chip\htssop-56-1.pad
\t (00:00:01) \t (00:00:01)
\d (00:00:03) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers" \d (00:00:02) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers"
\d (00:00:04) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false + \d (00:00:03) QtSignal MainWindow Save triggered
\d (00:00:04) QtSignal 1 \t (00:00:05) Journal end - Wed Aug 7 01:05:20 2024
\d (00:00:04) QtSignal GuidedDesignLayersTab PadWidth editingFinished "1.0000"
\d (00:00:06) QtSignal GuidedTabsParent GuidedTabs currentChanged "Mask Layers"
\d (00:00:07) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:07) QtSignal 1
\d (00:00:10) QtSignal GuidedMaskLayersTab PadWidth editingFinished "1.0500"
\d (00:00:11) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged 2 Pad
\d (00:00:11) QtSignal GuidedMaskLayersTab LayersTable cellClicked 2 Pad 2 1
\d (00:00:12) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:12) QtSignal 1
\d (00:00:12) QtSignal GuidedMaskLayersTab PadWidth editingFinished "1.0000"
\d (00:00:14) QtSignal MainWindow Save triggered
\t (00:00:15) Journal end - Sat Aug 3 22:07:42 2024

51
chip/padstack_editor.jrl,1
View File

@@ -1,47 +1,8 @@
\t (00:00:01) padstack_editor 17.4 S035 Windows SPB 64-bit Edition \t (00:00:01) padstack_editor 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:01) Journal start - Sat Aug 3 21:58:52 2024 \t (00:00:01) Journal start - Wed Aug 7 01:05:05 2024
\t (00:00:01) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=22372 CPUs=12 \t (00:00:01) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=26352 CPUs=12
\t (00:00:01) CmdLine= d:\software\cadence\spb_17.4\tools\bin\padstack_editor.exe D:\workspace\GitHub\pcb_lib\chip\ssop-4.pad \t (00:00:01) CmdLine= d:\software\cadence\spb_17.4\tools\bin\padstack_editor.exe D:\workspace\GitHub\pcb_lib\chip\htssop-56.pad
\t (00:00:01) \t (00:00:01)
\d (00:00:03) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers" \d (00:00:06) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers"
\d (00:00:05) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false + \d (00:00:08) QtSignal MainWindow Save triggered
\d (00:00:05) QtSignal 1 \t (00:00:10) Journal end - Wed Aug 7 01:05:13 2024
\d (00:00:13) QtSignal GuidedDesignLayersTab PadWidth editingFinished "1.0000"
\d (00:00:15) QtSignal GuidedDesignLayersTab PadHeight editingFinished "0.4000"
\d (00:00:27) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:27) QtSignal 1
\d (00:00:33) QtSignal GuidedDesignLayersTab PadHeight editingFinished "1.0000"
\d (00:00:36) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:36) QtSignal 1
\d (00:00:41) QtSignal GuidedDesignLayersTab PadWidth editingFinished "0.4000"
\d (00:00:43) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:43) QtSignal 1
\d (00:00:45) QtSignal GuidedDesignLayersTab PadWidth editingFinished "1.0000"
\d (00:00:46) QtSignal GuidedDesignLayersTab PadHeight editingFinished "0.2000"
\d (00:00:51) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:51) QtSignal 1
\d (00:00:52) QtSignal GuidedDesignLayersTab PadWidth editingFinished "0.4000"
\d (00:01:03) QtSignal GuidedDesignLayersTab PadHeight editingFinished "0.5000"
\d (00:01:19) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false +
\d (00:01:19) QtSignal 1
\d (00:01:20) QtSignal GuidedDesignLayersTab PadWidth editingFinished "0.5000"
\d (00:01:21) QtSignal GuidedDesignLayersTab PadHeight editingFinished "0.4000"
\d (00:01:32) QtSignal GuidedTabsParent GuidedTabs currentChanged "Mask Layers"
\d (00:01:34) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:01:34) QtSignal 1
\d (00:01:35) QtSignal GuidedMaskLayersTab PadWidth editingFinished "0.5000"
\d (00:01:36) QtSignal GuidedMaskLayersTab PadHeight editingFinished "0.4000"
\d (00:01:38) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged 2 Pad
\d (00:01:38) QtSignal GuidedMaskLayersTab LayersTable cellClicked 2 Pad 2 1
\d (00:01:39) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged 0 Pad
\d (00:01:39) QtSignal GuidedMaskLayersTab LayersTable cellClicked 0 Pad 0 1
\d (00:01:41) QtSignal GuidedMaskLayersTab PadWidth editingFinished "0.5500"
\d (00:01:42) QtSignal GuidedMaskLayersTab PadHeight editingFinished "0.4500"
\d (00:01:43) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged 2 Pad
\d (00:01:44) QtSignal GuidedMaskLayersTab LayersTable cellClicked 2 Pad 2 1
\d (00:01:45) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:01:45) QtSignal 1
\d (00:01:45) QtSignal GuidedMaskLayersTab PadWidth editingFinished "0.5000"
\d (00:01:46) QtSignal GuidedMaskLayersTab PadHeight editingFinished "0.4000"
\d (00:01:48) QtSignal MainWindow Save triggered
\t (00:01:49) Journal end - Sat Aug 3 22:00:40 2024

6
chip/param_read.log
View File

@@ -2,15 +2,15 @@
( ) ( )
( Parameter File READ ) ( Parameter File READ )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : htssop-56.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:01:23 2024 ) ( Date/Time : Wed Aug 7 01:10:16 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Paramfile Name : D:/workspace/GitHub/pcb_lib/XerolySkinner.prm Paramfile Name : D:/workspace/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : D:/workspace/GitHub/pcb_lib/chip/ssop-4.dra Layout Name : D:/workspace/GitHub/pcb_lib/chip/htssop-56.dra
Reading...parameter_header: Reading...parameter_header:
Reading...db_common_type: Reading...db_common_type:

128
chip/param_read.log,2 Normal file
View File

@@ -0,0 +1,128 @@
(---------------------------------------------------------------------)
( )
( Parameter File READ )
( )
( Drawing : ssop-4.dra )
( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:01:23 2024 )
( )
(---------------------------------------------------------------------)
Paramfile Name : D:/workspace/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : D:/workspace/GitHub/pcb_lib/chip/ssop-4.dra
Reading...parameter_header:
Reading...db_common_type:
Reading...grid_parms_type:
WARNING: The value of element <etchcount> is not equal to the number of
user defined subclass under ETCH class.
Reading...UnusedPadsSuppressionSettings:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDTOP"
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDBOTTOM"
Reading...art_class_type:
Reading...art_class_type:
Reading...color_table_table:
Reading...ColorParmType:
Reading...profileCustomColors:
Reading...text_size_table:
Reading...drf_parm_type:
Reading...av_parm_type:
Reading...dynfill_parm_type:
Reading...probe_parm_type:
Reading...ifp_parm_type:
Reading...ministat_parm_type:
WARNING: Unmatched Data - Field Name: acon_active_sc , Value: "SIGNEDTOP"
Reading...ats_parm_type:
Reading...placement_parameter_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
..... Total number of errors: 0.
..... Total number of warnings: 4.

23
chip/ssop-4.log,2
View File

@@ -1,23 +0,0 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : ssop-4.dra )
( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:07:58 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/chip
Name = ssop-4.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

102895
chip/stepFacetFiles4Map/htssop-56.xml Normal file
View File

File diff suppressed because it is too large Load Diff

3
chip/stepFacetFiles4Map/stepFileInfo.txt
View File

@@ -2,6 +2,7 @@
D8-M.step ! 282667 ! 1568096060 D8-M.step ! 282667 ! 1568096060
SOT-223.step ! 227596 ! 1710578258 SOT-223.step ! 227596 ! 1710578258
htssop-56.step ! 2056211 ! 1722964516
tssop8.STEP ! 174674 ! 1711377980 tssop8.STEP ! 174674 ! 1711377980
lqfp48.step ! 1919983 ! 1711219780 lqfp48.step ! 1919983 ! 1711219780
D8-L.step ! 282667 ! 1568096060 D8-L.step ! 282667 ! 1568096060
@@ -15,5 +16,5 @@ tssop8.step ! 306368 ! 1711457082
LED_0603_G.STEP ! 178570 ! 1710578258 LED_0603_G.STEP ! 178570 ! 1710578258
KEY_SOT_P2.step ! 151224 ! 1710578258 KEY_SOT_P2.step ! 151224 ! 1710578258
sop-14.step ! 521672 ! 1710578258 sop-14.step ! 521672 ! 1710578258
ufqfpn28_2.step ! 4307335 ! 1711439232
ssop-4.STEP ! 294871 ! 1722693500 ssop-4.STEP ! 294871 ! 1722693500
ufqfpn28_2.step ! 4307335 ! 1711439232

2
chip/stepFacetFiles4Map/stepFileInfo.txt,1
View File

@@ -15,5 +15,5 @@ tssop8.step ! 306368 ! 1711457082
LED_0603_G.STEP ! 178570 ! 1710578258 LED_0603_G.STEP ! 178570 ! 1710578258
KEY_SOT_P2.step ! 151224 ! 1710578258 KEY_SOT_P2.step ! 151224 ! 1710578258
sop-14.step ! 521672 ! 1710578258 sop-14.step ! 521672 ! 1710578258
ssop-4.STEP ! 294871 ! 1722693500
ufqfpn28_2.step ! 4307335 ! 1711439232 ufqfpn28_2.step ! 4307335 ! 1711439232
ssop-4.STEP ! 294871 ! 1722693500

BIN
other/KF7_62-3P.dra Normal file
View File

Binary file not shown.

40
other/allegro.jrl Normal file
View File

@@ -0,0 +1,40 @@
\t (00:00:04) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:04) Journal start - Fri Aug 9 09:30:34 2024
\t (00:00:04) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=23064 CPUs=12
\t (00:00:04) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\other\link-3_5-2x5.dra
\t (00:00:04)
(00:00:04) Loading axlcore.cxt
\t (00:00:04) Opening existing design...
\i (00:00:04) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "link-3_5-2x5"
\d (00:00:04) Design opened: D:/workspace/GitHub/pcb_lib/other/link-3_5-2x5.dra
\t (00:00:05) Grids are drawn 0.0800, 0.0800 apart for enhanced viewing.
\i (00:00:05) trapsize 930
\i (00:00:05) trapsize 954
\i (00:00:05) trapsize 930
\i (00:00:06) trapsize 816
\i (00:00:06) trapsize 838
\i (00:00:06) trapsize 861
\t (00:00:06) Grids are drawn 0.0800, 0.0800 apart for enhanced viewing.
\i (00:00:06) trapsize 884
\i (00:00:14) change
\i (00:00:18) setwindow form.mini
\i (00:00:18) FORM mini change_class 'PACKAGE GEOMETRY'
\i (00:00:20) FORM mini change_subclass PLACE_BOUND_TOP
\i (00:00:23) setwindow pcb
\i (00:00:23) pick grid 5.3669 0.5089
\t (00:00:23) last pick: 5.3700 0.5100
\e (00:00:23) ERROR(SPMHGE-536): Shape line width cannot be changed.
\i (00:00:31) setwindow form.mini
\i (00:00:31) FORM mini apply_width NO
\i (00:00:33) setwindow pcb
\i (00:00:33) pick grid 5.3846 0.4558
\t (00:00:33) last pick: 5.3800 0.4600
\t (00:00:33) No DRC errors detected.
\t (00:00:33) Changed 1 items out of 1 items found.
\i (00:00:34) prepopup 1.6885 2.5603
\i (00:00:35) done
\i (00:00:36) save
\i (00:00:36) fillin yes
\t (00:00:37) Symbol 'link-3_5-2x5.psm' created.
\i (00:00:37) exit
\t (00:00:38) Journal end - Fri Aug 9 09:31:08 2024

46
other/allegro.jrl,1 Normal file
View File

@@ -0,0 +1,46 @@
\t (00:00:03) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:03) Journal start - Fri Aug 9 03:51:44 2024
\t (00:00:03) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=25880 CPUs=12
\t (00:00:03) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\other\link-3_5-2x4.dra
\t (00:00:03)
(00:00:03) Loading axlcore.cxt
\t (00:00:05) Opening existing design...
\i (00:00:06) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "link-3_5-2x4"
\d (00:00:06) Design opened: D:/workspace/GitHub/pcb_lib/other/link-3_5-2x4.dra
\t (00:00:06) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:00:06) trapsize 1675
\i (00:00:07) trapsize 1719
\i (00:00:07) trapsize 1675
\i (00:00:08) trapsize 1469
\i (00:00:08) trapsize 1509
\i (00:00:08) trapsize 1552
\t (00:00:08) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:00:08) trapsize 1593
\i (00:00:14) step pkg map
\i (00:00:15) fillin yes
\i (00:00:21) setwindow form.pkgmap3d
\i (00:00:21) FORM pkgmap3d stplist link_3.5_2x4.STEP
\i (00:00:23) FORM pkgmap3d rotation_x 90
\i (00:00:25) FORM pkgmap3d overlay YES
\i (00:00:27) FORM pkgmap3d view_orientation Right
\i (00:00:30) FORM pkgmap3d view_orientation Bottom
\i (00:00:33) FORM pkgmap3d hide_board YES
\i (00:00:36) FORM pkgmap3d offset_x -7
\i (00:00:38) FORM pkgmap3d offset_y -7
\i (00:00:41) FORM pkgmap3d offset_x -6
\i (00:00:44) FORM pkgmap3d offset_x -6.5
\i (00:00:46) FORM pkgmap3d offset_x -5
\i (00:00:49) FORM pkgmap3d offset_x -5.5
\i (00:00:57) FORM pkgmap3d offset_x -5.25
\i (00:01:05) FORM pkgmap3d offset_y -7.5000
\i (00:01:08) FORM pkgmap3d offset_y -6.5
\i (00:01:11) FORM pkgmap3d offset_y -6
\i (00:01:14) FORM pkgmap3d offset_y -6.75
\i (00:01:16) FORM pkgmap3d save_current
\i (00:01:17) FORM pkgmap3d done
\i (00:01:18) setwindow pcb
\i (00:01:18) save
\i (00:01:18) fillin yes
\t (00:01:19) Symbol 'link-3_5-2x4.psm' created.
\i (00:01:19) exit
\t (00:01:20) Journal end - Fri Aug 9 03:53:01 2024

14
other/downrev.log Normal file
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@@ -0,0 +1,14 @@
(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : link-3_5-2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 09:31:07 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

14
other/downrev.log,1 Normal file
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@@ -0,0 +1,14 @@
(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : link-3_5-2x4.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:53:00 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

14
other/downrev.log,2 Normal file
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@@ -0,0 +1,14 @@
(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : link-3_5-2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 09:31:07 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

14
other/downrev.log,3 Normal file
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@@ -0,0 +1,14 @@
(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : link-3_5-2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 09:31:07 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

23
other/kf7_62-3p.log Normal file
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@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : KF7_62-3P.dra )
( Software Version : 17.4S035 )
( Date/Time : Wed Aug 7 06:08:36 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/other
Name = kf7_62-3p.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

23
other/kf7_62-3p.log,1 Normal file
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@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : KF7_62-3P.dra )
( Software Version : 17.4S035 )
( Date/Time : Wed Aug 7 06:06:06 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/other
Name = kf7_62-3p.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

23
other/kf7_62-3p.log,2 Normal file
View File

@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : KF7_62-3P.dra )
( Software Version : 17.4S035 )
( Date/Time : Wed Aug 7 06:06:21 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/other
Name = kf7_62-3p.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

BIN
other/kf7_62-3p.psm Normal file
View File

Binary file not shown.

BIN
other/link-3_5-2x4.dra Normal file
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Binary file not shown.

23
other/link-3_5-2x4.log Normal file
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@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : link-3_5-2x4.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:53:00 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/other
Name = link-3_5-2x4.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

23
other/link-3_5-2x4.log,1 Normal file
View File

@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : link-3_5-2x4.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:51:14 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/š¤×÷żâ/GitHub/pcb_lib/other
Name = link-3_5-2x4.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

23
other/link-3_5-2x4.log,2 Normal file
View File

@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : link-3_5-2x4.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:51:20 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/š¤×÷żâ/GitHub/pcb_lib/other
Name = link-3_5-2x4.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

BIN
other/link-3_5-2x4.psm Normal file
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Binary file not shown.

BIN
other/link-3_5-2x5.dra Normal file
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Binary file not shown.

23
other/link-3_5-2x5.log Normal file
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@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : link-3_5-2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 09:31:07 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/other
Name = link-3_5-2x5.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

23
other/link-3_5-2x5.log,1 Normal file
View File

@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : link-3_5-2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:29:50 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/other
Name = link-3_5-2x5.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

23
other/link-3_5-2x5.log,2 Normal file
View File

@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : link-3_5-2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:32:19 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/other
Name = link-3_5-2x5.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

23
other/link-3_5-2x5.log,3 Normal file
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@@ -0,0 +1,23 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : link-3_5-2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:35:19 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/other
Name = link-3_5-2x5.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

BIN
other/link-3_5-2x5.psm Normal file
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Binary file not shown.

1
other/master.tag Normal file
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@@ -0,0 +1 @@
link-3_5-2x5.dra

128
other/param_read.log Normal file
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@@ -0,0 +1,128 @@
(---------------------------------------------------------------------)
( )
( Parameter File READ )
( )
( Drawing : link-3_5-2x4.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:43:40 2024 )
( )
(---------------------------------------------------------------------)
Paramfile Name : D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : link-3_5-2x4.dra
Reading...parameter_header:
Reading...db_common_type:
Reading...grid_parms_type:
WARNING: The value of element <etchcount> is not equal to the number of
user defined subclass under ETCH class.
Reading...UnusedPadsSuppressionSettings:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDTOP"
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDBOTTOM"
Reading...art_class_type:
Reading...art_class_type:
Reading...color_table_table:
Reading...ColorParmType:
Reading...profileCustomColors:
Reading...text_size_table:
Reading...drf_parm_type:
Reading...av_parm_type:
Reading...dynfill_parm_type:
Reading...probe_parm_type:
Reading...ifp_parm_type:
Reading...ministat_parm_type:
WARNING: Unmatched Data - Field Name: acon_active_sc , Value: "SIGNEDTOP"
Reading...ats_parm_type:
Reading...placement_parameter_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
..... Total number of errors: 0.
..... Total number of warnings: 4.

128
other/param_read.log,1 Normal file
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@@ -0,0 +1,128 @@
(---------------------------------------------------------------------)
( )
( Parameter File READ )
( )
( Drawing : KF7_62-3P.dra )
( Software Version : 17.4S035 )
( Date/Time : Wed Aug 7 06:02:31 2024 )
( )
(---------------------------------------------------------------------)
Paramfile Name : D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : KF7_62-3P.dra
Reading...parameter_header:
Reading...db_common_type:
Reading...grid_parms_type:
WARNING: The value of element <etchcount> is not equal to the number of
user defined subclass under ETCH class.
Reading...UnusedPadsSuppressionSettings:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDTOP"
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDBOTTOM"
Reading...art_class_type:
Reading...art_class_type:
Reading...color_table_table:
Reading...ColorParmType:
Reading...profileCustomColors:
Reading...text_size_table:
Reading...drf_parm_type:
Reading...av_parm_type:
Reading...dynfill_parm_type:
Reading...probe_parm_type:
Reading...ifp_parm_type:
Reading...ministat_parm_type:
WARNING: Unmatched Data - Field Name: acon_active_sc , Value: "SIGNEDTOP"
Reading...ats_parm_type:
Reading...placement_parameter_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
..... Total number of errors: 0.
..... Total number of warnings: 4.

128
other/param_read.log,2 Normal file
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(---------------------------------------------------------------------)
( )
( Parameter File READ )
( )
( Drawing : link_3.5_2x5.dra )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 9 03:19:30 2024 )
( )
(---------------------------------------------------------------------)
Paramfile Name : D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : link_3.5_2x5.dra
Reading...parameter_header:
Reading...db_common_type:
Reading...grid_parms_type:
WARNING: The value of element <etchcount> is not equal to the number of
user defined subclass under ETCH class.
Reading...UnusedPadsSuppressionSettings:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDTOP"
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDBOTTOM"
Reading...art_class_type:
Reading...art_class_type:
Reading...color_table_table:
Reading...ColorParmType:
Reading...profileCustomColors:
Reading...text_size_table:
Reading...drf_parm_type:
Reading...av_parm_type:
Reading...dynfill_parm_type:
Reading...probe_parm_type:
Reading...ifp_parm_type:
Reading...ministat_parm_type:
WARNING: Unmatched Data - Field Name: acon_active_sc , Value: "SIGNEDTOP"
Reading...ats_parm_type:
Reading...placement_parameter_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
..... Total number of errors: 0.
..... Total number of warnings: 4.

17779
other/stepFacetFiles4Map/KF7.62-3P.xml Normal file
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18263
other/stepFacetFiles4Map/link_3.5_2x4.xml Normal file
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18264
other/stepFacetFiles4Map/link_3.5_2x5.xml Normal file
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5
other/stepFacetFiles4Map/stepFileInfo.txt
View File

@@ -1,9 +1,14 @@
#STEP_FILE ! FILE_SIZE ! MOD_TIME #STEP_FILE ! FILE_SIZE ! MOD_TIME
link_3.5_2x1.STEP ! 435783 ! 1723144412
TYPE-C.stp ! 1362496 ! 1710578258 TYPE-C.stp ! 1362496 ! 1710578258
KF7.62-2P.STEP ! 217264 ! 1722981445
rtl8189-board.STEP ! 1900144 ! 1712473643 rtl8189-board.STEP ! 1900144 ! 1712473643
EC11.STEP ! 1541194 ! 1712715932 EC11.STEP ! 1541194 ! 1712715932
link_3.5_2x5.STEP ! 467005 ! 1723144633
KF7.62-3P.STEP ! 218099 ! 1722981496
rj45-8p8c.step ! 2080205 ! 1712409758 rj45-8p8c.step ! 2080205 ! 1712409758
link_3.5_2x4.STEP ! 466145 ! 1723146123
fpc0_5-40p.stp ! 9221743 ! 1584132940 fpc0_5-40p.stp ! 9221743 ! 1584132940
fpc0_5-6p.stp ! 1966209 ! 1584132963 fpc0_5-6p.stp ! 1966209 ! 1584132963
fpc0_5-50p.stp ! 11408226 ! 1584132947 fpc0_5-50p.stp ! 11408226 ! 1584132947

7
other/stepFacetFiles4Map/stepFileInfo.txt,1
View File

@@ -1,11 +1,16 @@
#STEP_FILE ! FILE_SIZE ! MOD_TIME #STEP_FILE ! FILE_SIZE ! MOD_TIME
link_3.5_2x1.STEP ! 435783 ! 1723144412
TYPE-C.stp ! 1362496 ! 1710578258 TYPE-C.stp ! 1362496 ! 1710578258
KF7.62-2P.STEP ! 217264 ! 1722981445
EC11.STEP ! 1541194 ! 1712715932 EC11.STEP ! 1541194 ! 1712715932
rtl8189-board.STEP ! 1900144 ! 1712473643 rtl8189-board.STEP ! 1900144 ! 1712473643
link_3.5_2x5.STEP ! 467005 ! 1723144633
KF7.62-3P.STEP ! 218099 ! 1722981496
rj45-8p8c.step ! 2080205 ! 1712409758 rj45-8p8c.step ! 2080205 ! 1712409758
link_3.5_2x4.STEP ! 466145 ! 1723146123
fpc0_5-40p.stp ! 9221743 ! 1584132940 fpc0_5-40p.stp ! 9221743 ! 1584132940
fpc0_5-6p.stp ! 1966209 ! 1584132963 fpc0_5-6p.stp ! 1966209 ! 1584132963
fpc0_5-50p.stp ! 11408226 ! 1584132947 fpc0_5-50p.stp ! 11408226 ! 1584132947
wh-gm5.STEP ! 838718 ! 1712836646 wh-gm5.STEP ! 888098 ! 1712839932
oled-0_96.step ! 601137 ! 1712757601 oled-0_96.step ! 601137 ! 1712757601

62
thr/allegro.jrl
View File

@@ -1,19 +1,49 @@
\t (00:00:03) allegro 17.4 S035 Windows SPB 64-bit Edition \t (00:00:03) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:03) Journal start - Fri Aug 2 04:06:58 2024 \t (00:00:03) Journal start - Thu Aug 8 07:02:55 2024
\t (00:00:03) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=9792 CPUs=12 \t (00:00:03) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=21748 CPUs=12
\t (00:00:03) CmdLine= D:\SOFTWARE\Cadence\SPB_17.4\tools\bin\allegro.exe \t (00:00:03) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\thr\to220-3.dra
\t (00:00:03) \t (00:00:03)
(00:00:03) Loading axlcore.cxt (00:00:03) Loading axlcore.cxt
\t (00:00:06) Opening existing design... \t (00:00:05) Opening existing design...
\i (00:00:06) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "L298N_with_heat" \i (00:00:05) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "to220-3"
\d (00:00:06) Design opened: D:/workspace/GitHub/pcb_lib/thr/L298N_with_heat.dra \d (00:00:05) Design opened: D:/workspace/GitHub/pcb_lib/thr/to220-3.dra
\i (00:00:07) trapsize 860 \i (00:00:06) trapsize 419
\i (00:00:08) trapsize 883 \i (00:00:06) trapsize 430
\i (00:00:08) trapsize 860 \i (00:00:06) trapsize 419
\i (00:00:09) trapsize 755 \i (00:00:06) trapsize 368
\i (00:00:09) trapsize 775 \i (00:00:06) trapsize 378
\i (00:00:09) trapsize 797 \i (00:00:06) trapsize 388
\i (00:00:09) trapsize 818 \i (00:00:06) trapsize 399
\i (00:00:11) new \i (00:00:10) step pkg map
\i (00:00:24) newdrawfillin "sma.dra" "Package Symbol" \i (00:00:11) fillin yes
\t (00:00:24) Journal end - Fri Aug 2 04:07:19 2024 \i (00:00:17) setwindow form.pkgmap3d
\i (00:00:17) FORM pkgmap3d stplist TO220-3.step
\i (00:00:20) FORM pkgmap3d rotation_x 90
\i (00:00:22) FORM pkgmap3d rotation_x 0
\i (00:00:23) FORM pkgmap3d rotation_y 90
\i (00:00:25) FORM pkgmap3d overlay YES
\i (00:00:31) FORM pkgmap3d offset_y 10
\i (00:00:32) FORM pkgmap3d offset_y 0
\i (00:00:33) FORM pkgmap3d offset_z 10
\i (00:00:34) FORM pkgmap3d offset_z 20
\i (00:00:36) FORM pkgmap3d hide_board YES
\i (00:00:39) FORM pkgmap3d view_orientation Right
\i (00:00:43) FORM pkgmap3d view_orientation Top
\i (00:00:51) FORM pkgmap3d rotation_z 180
\i (00:00:55) FORM pkgmap3d offset_y -2
\i (00:00:56) FORM pkgmap3d offset_y 2
\i (00:00:58) FORM pkgmap3d offset_y 3
\i (00:01:00) FORM pkgmap3d offset_y 2.5
\i (00:01:03) FORM pkgmap3d view_orientation Right
\i (00:01:08) FORM pkgmap3d view_orientation Bottom
\i (00:01:19) FORM pkgmap3d view_orientation Top
\i (00:01:23) FORM pkgmap3d view_orientation Front
\i (00:01:24) FORM pkgmap3d hide_board NO
\i (00:01:32) FORM pkgmap3d save_current
\i (00:01:33) FORM pkgmap3d done
\i (00:01:35) setwindow pcb
\i (00:01:35) save
\i (00:01:35) fillin yes
\t (00:01:36) Symbol 'to220-3.psm' created.
\i (00:01:46) exit
\t (00:01:47) Journal end - Thu Aug 8 07:04:39 2024

918
thr/allegro.jrl,1
View File

@@ -1,620 +1,300 @@
\t (00:00:05) allegro 17.4 S035 Windows SPB 64-bit Edition \t (00:01:39) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:05) Journal start - Fri Aug 2 03:22:03 2024 \t (00:01:39) Journal start - Thu Aug 8 06:55:41 2024
\t (00:00:05) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=21380 CPUs=12 \t (00:01:39) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=19820 CPUs=12
\t (00:00:05) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\thr\L298N_with_heat.dra \t (00:01:39) CmdLine= D:\SOFTWARE\Cadence\SPB_17.4\tools\bin\allegro.exe
\t (00:00:05) \t (00:01:39)
(00:00:05) Loading axlcore.cxt \t (00:01:39) Starting new design...
\t (00:00:08) Opening existing design... \i (00:01:40) trapsize 19069
\i (00:00:08) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "L298N_with_heat" \i (00:01:40) trapsize 19592
\d (00:00:08) Design opened: D:/workspace/GitHub/pcb_lib/thr/L298N_with_heat.dra \i (00:01:40) trapsize 19069
\t (00:00:08) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing. \t (00:01:40) Grids are drawn 1300.4800, 1300.4800 apart for enhanced viewing.
\i (00:00:08) trapsize 1676 \i (00:01:40) trapsize 24975
\i (00:00:08) trapsize 1721 \i (00:01:40) trapsize 24975
\i (00:00:08) trapsize 1676 \i (00:01:40) trapsize 21275
\i (00:00:08) trapsize 1470 \i (00:01:40) trapsize 21857
\i (00:00:08) trapsize 1510 \i (00:01:40) trapsize 22472
\i (00:00:09) trapsize 1553 \i (00:02:01) param in
\t (00:00:09) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing. \i (00:02:01) pick grid dbl -129.0986 82.1419
\i (00:00:09) trapsize 1594 \t (00:02:01) last pick: -129.5400 81.2800
\i (00:00:12) zoom in 1 \i (00:02:02) setwindow form.parm_in
\i (00:00:12) setwindow pcb \i (00:02:02) FORM parm_in browse
\i (00:00:12) zoom in 2.6611 12.9356 \i (00:02:05) fillin "D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm"
\i (00:00:12) trapsize 797 \i (00:02:06) FORM parm_in execute
\i (00:00:12) zoom in 1 \t (00:02:06) Starting Importing parameter file...
\i (00:00:12) setwindow pcb \w (00:02:07) WARNING(SPMHGE-269): param in had warnings, use Viewlog to review the log file.
\i (00:00:12) zoom in 2.6611 12.9356 \t (00:02:07) Opening existing design...
\i (00:00:12) trapsize 399 \t (00:02:07) Grids are drawn 2.5400, 2.5400 apart for enhanced viewing.
\i (00:00:12) zoom out 1 \i (00:02:07) setwindow pcb
\i (00:00:12) setwindow pcb \i (00:02:07) trapsize 22472
\i (00:00:12) zoom out 2.5097 11.5408 \i (00:02:07) trapsize 23026
\i (00:00:12) trapsize 797 \i (00:02:07) trapsize 22472
\i (00:00:12) zoom out 1 \t (00:02:07) Grids are drawn 2.5400, 2.5400 apart for enhanced viewing.
\i (00:00:12) setwindow pcb \i (00:02:07) trapsize 23282
\i (00:00:12) zoom out 2.5096 11.5408 \i (00:02:07) trapsize 24826
\i (00:00:12) trapsize 1594 \i (00:02:08) setwindow text
\i (00:00:12) zoom out 1 \i (00:02:08) close
\i (00:00:12) setwindow pcb \t (00:02:09) last pick: 377.1102 78.6991
\i (00:00:12) zoom out 2.5097 11.5409 \w (00:02:09) WARNING(SPMHUT-40): Pick is outside the extent of the drawing ... pick again.
\t (00:00:12) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing. \i (00:02:10) setwindow form.parm_in
\i (00:00:12) trapsize 3188 \i (00:02:10) FORM parm_in cancel
\i (00:00:13) zoom in 1 \i (00:02:11) setwindow pcb
\i (00:00:13) setwindow pcb \i (00:02:11) zoom in 1
\i (00:00:13) zoom in -1.9536 7.9702 \i (00:02:11) setwindow pcb
\t (00:00:13) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing. \i (00:02:11) zoom in 3.7239 4.2204
\i (00:00:13) trapsize 1594 \t (00:02:11) Grids are drawn 1.2700, 1.2700 apart for enhanced viewing.
\i (00:00:15) delete \i (00:02:11) trapsize 12413
\i (00:00:17) pick grid -8.2022 10.0106 \i (00:02:13) add pin
\t (00:00:17) last pick: -8.2000 10.0000 \i (00:02:15) setwindow form.mini
\t (00:00:17) Pin "Thr-1r3-2r0, 11" \i (00:02:15) FORM mini pad_name thr-1r3-2r0
\i (00:00:18) pick grid -4.9823 9.6599 \t (00:02:15) Using 'THR-1R3-2R0.pad'.
\t (00:00:18) last pick: -5.0000 9.7000 \i (00:02:17) FORM mini x_count 3
\t (00:00:18) Pin "Thr-1r3-2r0, 9" \i (00:02:19) FORM mini next_pin_number 1
\i (00:00:18) pick grid -7.0226 4.3039 \i (00:02:22) FORM mini text_name pin
\t (00:00:18) last pick: -7.0000 4.3000 \i (00:02:44) FORM mini x_spacing 2.5400
\t (00:00:18) Pin "Thr-1r3-2r0, 10" \i (00:02:47) setwindow pcb
\i (00:00:19) pick grid -3.4201 3.9214 \i (00:02:47) pick x -2.54
\t (00:00:19) last pick: -3.4000 3.9000 \t (00:02:47) last pick: -2.5400 81.2800
\t (00:00:19) Pin "Thr-1r3-2r0, 8" \t (00:02:47) Using 'THR-1R3-2R0.pad'.
\i (00:00:20) pick grid -0.1364 3.8895 \i (00:02:48) prepopup 119.6624 19.8610
\t (00:00:20) last pick: -0.1000 3.9000 \i (00:02:49) oops
\t (00:00:20) Pin "Thr-1r3-2r0, 6" \t (00:02:49) Using 'THR-1R3-2R0.pad'.
\i (00:00:21) pick grid -1.2841 8.9267 \i (00:02:53) pick -2.54 0
\t (00:00:21) last pick: -1.3000 8.9000 \t (00:02:53) last pick: -2.5400 0.0000
\t (00:00:21) Pin "Thr-1r3-2r0, 7" \t (00:02:53) Using 'THR-1R3-2R0.pad'.
\i (00:00:21) pick grid 1.8403 9.0223 \i (00:02:54) zoom in 1
\t (00:00:21) last pick: 1.8000 9.0000 \i (00:02:54) setwindow pcb
\t (00:00:21) Pin "Thr-1r3-2r0, 5" \i (00:02:54) zoom in -2.7308 -2.7309
\i (00:00:22) pick grid 5.3471 8.7673 \i (00:02:54) trapsize 6207
\t (00:00:22) last pick: 5.3000 8.8000 \i (00:02:54) zoom in 1
\t (00:00:22) Pin "Thr-1r3-2r0, 3" \i (00:02:54) setwindow pcb
\i (00:00:23) pick grid 3.8806 4.3039 \i (00:02:54) zoom in -2.7308 -2.7309
\t (00:00:23) last pick: 3.9000 4.3000 \i (00:02:54) trapsize 3103
\t (00:00:23) Pin "Thr-1r3-2r0, 4" \i (00:02:55) zoom in 1
\i (00:00:23) pick grid 7.4194 4.0170 \i (00:02:55) setwindow pcb
\t (00:00:23) last pick: 7.4000 4.0000 \i (00:02:55) zoom in -2.7308 -2.7309
\t (00:00:23) Pin "Thr-1r3-2r0, 2" \i (00:02:55) trapsize 1552
\i (00:00:24) pick grid 8.9816 8.8948 \i (00:02:55) zoom in 1
\t (00:00:24) last pick: 9.0000 8.9000 \i (00:02:55) setwindow pcb
\t (00:00:24) Pin "Thr-1r3-2r0, 1" \i (00:02:55) zoom in -2.7308 -2.7309
\i (00:00:25) pick grid 11.4683 11.1902 \i (00:02:55) trapsize 776
\t (00:00:25) last pick: 11.5000 11.2000 \i (00:02:55) prepopup -1.2877 -2.9636
\i (00:00:25) prepopup 13.4768 10.6482 \i (00:02:56) done
\i (00:00:26) done \t (00:02:56) Exiting from Add Pin.
\i (00:00:27) add pin \i (00:04:16) add rect
\t (00:00:27) Using 'THR-1R6-2R3.pad'. \i (00:04:22) setwindow form.mini
\i (00:00:29) add pin \i (00:04:22) FORM mini class 'PACKAGE GEOMETRY'
\t (00:00:29) Exiting from Add Pin. \i (00:04:24) FORM mini subclass SILKSCREEN_TOP
\t (00:00:29) Using 'THR-1R6-2R3.pad'.
\i (00:00:32) setwindow form.mini
\i (00:00:32) FORM mini pad_browse
\i (00:00:48) fillin "Thr-1r3-2r0"
\t (00:00:48) Using 'THR-1R3-2R0.pad'.
\i (00:01:13) FORM mini x_count 7
\i (00:01:21) FORM mini x_spacing 2.5400
\i (00:01:46) setwindow pcb
\i (00:01:46) subclass --
\i (00:01:46) updateport CVPane
\i (00:02:06) pick -7.62 9.63
\t (00:02:06) last pick: -7.6200 9.6300
\t (00:02:06) Using 'THR-1R3-2R0.pad'.
\i (00:02:27) setwindow form.mini
\i (00:02:27) FORM mini x_count 8
\i (00:02:57) setwindow pcb
\i (00:02:57) pick -8.89 4.55
\t (00:02:57) last pick: -8.8900 4.5500
\t (00:02:57) Using 'THR-1R3-2R0.pad'.
\i (00:02:59) prepopup 10.7988 12.8799
\i (00:03:00) done
\t (00:03:00) Exiting from Add Pin.
\i (00:03:00) zoom out 1
\i (00:03:00) setwindow pcb
\i (00:03:00) zoom out 2.5735 9.8193
\t (00:03:00) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing.
\i (00:03:00) trapsize 3188
\i (00:03:01) zoom in 1
\i (00:03:01) setwindow pcb
\i (00:03:01) zoom in 1.8084 13.0074
\t (00:03:01) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:03:01) trapsize 1594
\i (00:03:01) zoom in 1
\i (00:03:01) setwindow pcb
\i (00:03:01) zoom in 1.8084 13.0075
\i (00:03:01) trapsize 797
\i (00:03:02) zoom out 1
\i (00:03:02) setwindow pcb
\i (00:03:02) zoom out 1.4737 10.5687
\i (00:03:02) trapsize 1594
\i (00:03:20) text edit
\i (00:03:21) zoom in 1
\i (00:03:21) setwindow pcb
\i (00:03:21) zoom in 8.1687 5.6590
\i (00:03:21) trapsize 797
\i (00:03:23) pick grid 8.7904 4.4794
\t (00:03:23) last pick: 8.8000 4.5000
\i (00:03:27) setwindow pcb
\i (00:03:27) pick grid 7.5789 9.6441
\t (00:03:27) last pick: 7.6000 9.6000
\i (00:03:27) setwindow pcb
\i (00:03:27) pick 8.7904 4.4794
\t (00:03:27) Pick text to edit.
\i (00:03:29) setwindow pcb
\i (00:03:29) pick grid 6.1602 4.5751
\t (00:03:29) last pick: 6.2000 4.6000
\i (00:03:29) setwindow pcb
\i (00:03:29) pick 7.5789 9.6441
\t (00:03:29) Pick text to edit.
\i (00:03:32) setwindow pcb
\i (00:03:32) pick grid 4.9806 9.5644
\t (00:03:32) last pick: 5.0000 9.6000
\i (00:03:32) setwindow pcb
\i (00:03:32) pick 6.1602 4.5751
\t (00:03:32) Pick text to edit.
\i (00:03:34) setwindow pcb
\i (00:03:34) pick grid 3.6257 4.5432
\t (00:03:34) last pick: 3.6000 4.5000
\i (00:03:34) setwindow pcb
\i (00:03:34) pick 4.9806 9.5644
\t (00:03:34) Pick text to edit.
\i (00:03:36) setwindow pcb
\i (00:03:36) pick grid 2.2548 9.5804
\t (00:03:36) last pick: 2.3000 9.6000
\i (00:03:36) setwindow pcb
\i (00:03:36) pick 3.6257 4.5432
\t (00:03:36) Pick text to edit.
\i (00:03:46) setwindow pcb
\i (00:03:46) pick grid 4.9328 9.6123
\t (00:03:46) last pick: 4.9000 9.6000
\i (00:03:46) setwindow pcb
\i (00:03:46) pick 2.2548 9.5804
\t (00:03:46) Pick text to edit.
\i (00:03:48) setwindow pcb
\i (00:03:48) pick grid 3.7532 4.5273
\t (00:03:48) last pick: 3.8000 4.5000
\i (00:03:48) setwindow pcb
\i (00:03:48) pick 4.9328 9.6123
\t (00:03:48) Pick text to edit.
\i (00:03:49) setwindow pcb
\i (00:03:49) pick grid 2.5417 9.5963
\t (00:03:49) last pick: 2.5000 9.6000
\i (00:03:49) setwindow pcb
\i (00:03:49) pick 3.7532 4.5273
\t (00:03:49) Pick text to edit.
\i (00:03:51) setwindow pcb
\i (00:03:51) pick grid 1.2346 4.6070
\t (00:03:51) last pick: 1.2000 4.6000
\i (00:03:51) setwindow pcb
\i (00:03:51) pick 2.5417 9.5963
\t (00:03:51) Pick text to edit.
\i (00:03:53) setwindow pcb
\i (00:03:53) pick grid 0.0232 9.5963
\t (00:03:53) last pick: 0.0000 9.6000
\i (00:03:53) setwindow pcb
\i (00:03:53) pick 1.2346 4.6070
\t (00:03:53) Pick text to edit.
\i (00:03:56) setwindow pcb
\i (00:03:56) pick grid -1.3955 4.4635
\t (00:03:56) last pick: -1.4000 4.5000
\i (00:03:56) setwindow pcb
\i (00:03:56) pick 0.0232 9.5963
\t (00:03:56) Pick text to edit.
\i (00:03:58) setwindow pcb
\i (00:03:58) pick grid -2.6070 9.5963
\t (00:03:58) last pick: -2.6000 9.6000
\i (00:03:58) setwindow pcb
\i (00:03:58) pick -1.3955 4.4635
\t (00:03:58) Pick text to edit.
\i (00:04:01) setwindow pcb
\i (00:04:01) pick grid -3.9141 4.4794
\t (00:04:01) last pick: -3.9000 4.5000
\i (00:04:01) setwindow pcb
\i (00:04:01) pick -2.6070 9.5963
\t (00:04:01) Pick text to edit.
\i (00:04:03) setwindow pcb
\i (00:04:03) pick grid -5.1894 9.7079
\t (00:04:03) last pick: -5.2000 9.7000
\i (00:04:03) setwindow pcb
\i (00:04:03) pick -3.9141 4.4794
\t (00:04:03) Pick text to edit.
\i (00:04:05) setwindow pcb
\i (00:04:05) pick grid -6.6399 4.4476
\t (00:04:05) last pick: -6.6000 4.4000
\i (00:04:05) setwindow pcb
\i (00:04:05) pick -5.1894 9.7079
\t (00:04:05) Pick text to edit.
\i (00:04:06) setwindow pcb
\i (00:04:06) pick grid -7.7080 9.6441
\t (00:04:06) last pick: -7.7000 9.6000
\i (00:04:06) setwindow pcb
\i (00:04:06) pick -6.6399 4.4476
\t (00:04:06) Pick text to edit.
\i (00:04:08) setwindow pcb
\i (00:04:08) pick grid -8.9354 4.6867
\t (00:04:08) last pick: -8.9000 4.7000
\i (00:04:08) setwindow pcb
\i (00:04:08) pick -7.7080 9.6441
\i (00:04:10) setwindow pcb
\i (00:04:10) zoom out 1
\i (00:04:10) setwindow pcb
\i (00:04:10) zoom out -3.0852 5.1649
\i (00:04:10) trapsize 1594
\i (00:04:10) zoom out 1
\i (00:04:10) setwindow pcb
\i (00:04:10) zoom out -3.0853 5.1648
\t (00:04:10) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing.
\i (00:04:10) trapsize 3188
\i (00:04:11) prepopup 2.1432 15.1117
\i (00:04:11) done
\i (00:04:11) setwindow pcb
\i (00:04:11) pick -8.9354 4.6867
\t (00:04:11) Pick text to edit.
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom in 1
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom in -1.8737 5.8663
\t (00:04:12) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:04:12) trapsize 1594
\i (00:04:12) zoom in 1
\i (00:04:12) setwindow pcb
\i (00:04:12) zoom in -1.8737 5.8663
\i (00:04:12) trapsize 797
\i (00:04:20) zoom in 1
\i (00:04:20) setwindow pcb
\i (00:04:20) zoom in 2.7331 8.2733
\i (00:04:20) trapsize 399
\i (00:04:20) zoom in 1
\i (00:04:20) setwindow pcb
\i (00:04:20) zoom in 2.7331 8.2733
\i (00:04:20) trapsize 199
\i (00:04:20) zoom in 1
\i (00:04:20) setwindow pcb
\i (00:04:20) zoom in 2.7332 8.2734
\i (00:04:20) trapsize 100
\i (00:04:21) zoom in 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom in 2.6754 8.0642
\i (00:04:21) trapsize 50
\i (00:04:21) zoom in 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom in 2.6754 8.0642
\i (00:04:21) trapsize 25
\i (00:04:21) zoom in 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom in 2.6754 8.0643
\i (00:04:21) trapsize 12
\i (00:04:21) zoom in 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom in 2.6754 8.0643
\i (00:04:21) trapsize 6
\i (00:04:21) zoom in 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom in 2.6754 8.0643
\i (00:04:21) trapsize 3
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6755 8.0643
\i (00:04:21) trapsize 6
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6754 8.0643
\i (00:04:21) trapsize 12
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6755 8.0643
\i (00:04:21) trapsize 25
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6755 8.0643
\i (00:04:21) trapsize 50
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6756 8.0642
\i (00:04:21) trapsize 100
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6756 8.0623
\i (00:04:21) trapsize 199
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6756 8.0622
\i (00:04:21) trapsize 399
\i (00:04:21) zoom out 1
\i (00:04:21) setwindow pcb
\i (00:04:21) zoom out 2.6757 8.0623
\i (00:04:22) trapsize 797
\i (00:04:22) zoom out 1
\i (00:04:22) setwindow pcb
\i (00:04:22) zoom out 2.6756 8.0623
\i (00:04:22) trapsize 1594
\i (00:04:22) zoom in 1
\i (00:04:22) setwindow pcb
\i (00:04:22) zoom in -7.4630 5.7667
\i (00:04:22) trapsize 797
\i (00:04:22) zoom in 1
\i (00:04:22) setwindow pcb
\i (00:04:22) zoom in -7.4630 5.7667
\i (00:04:22) trapsize 399
\i (00:04:22) zoom in 1
\i (00:04:22) setwindow pcb
\i (00:04:22) zoom in -7.4630 5.7667
\i (00:04:22) trapsize 199
\i (00:04:23) zoom out 1
\i (00:04:23) setwindow pcb
\i (00:04:23) zoom out -7.4630 5.7667
\i (00:04:23) trapsize 399
\i (00:04:23) zoom out 1
\i (00:04:23) setwindow pcb
\i (00:04:23) zoom out -7.4630 5.7667
\i (00:04:23) trapsize 797
\i (00:04:24) zoom out 1
\i (00:04:24) setwindow pcb \i (00:04:24) setwindow pcb
\i (00:04:24) zoom out -7.4630 5.7667 \i (00:04:24) updateport CVPane
\i (00:04:24) trapsize 1594 \i (00:04:27) define grid
\i (00:04:24) zoom out 1 \t (00:04:27) Spacing fields allow simple equations to aid calculations; prefix with =
\i (00:04:24) setwindow pcb \i (00:04:28) setwindow form.grid
\i (00:04:24) zoom out -7.4630 5.7667 \i (00:04:28) FORM grid non_etch non_etch_x_grids 0.1
\t (00:04:24) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing. \i (00:04:29) FORM grid non_etch non_etch_y_grids 0.1
\i (00:04:24) trapsize 3188 \i (00:04:30) FORM grid all_etch all_etch_x_grids 0.1
\i (00:04:26) save \i (00:04:30) FORM grid all_etch all_etch_y_grids 0.1
\i (00:04:26) fillin yes \i (00:04:31) FORM grid done
\e (00:04:27) ERROR(SPMHGE-7): Error(s) occurred, check logfile. \i (00:04:35) setwindow pcb
\i (00:04:31) setwindow text \i (00:04:35) add line
\i (00:04:31) close \i (00:04:39) setwindow form.mini
\i (00:04:32) setwindow pcb \i (00:04:39) FORM mini line_width 0.1500
\i (00:04:32) zoom out 1 \i (00:05:06) setwindow pcb
\i (00:04:32) setwindow pcb \i (00:05:06) pick -5 2.5
\i (00:04:32) zoom out -0.8314 -0.1635 \t (00:05:06) last pick: -5.0000 2.5000
\t (00:04:32) Grids are drawn 0.8000, 0.8000 apart for enhanced viewing. \i (00:05:09) ipick 10
\i (00:04:32) trapsize 6377 \t (00:05:09) last pick: 5.0000 2.5000
\i (00:04:32) zoom out 1 \i (00:05:22) ipick 0 4.5
\i (00:04:32) setwindow pcb \t (00:05:22) last pick: 5.0000 7.0000
\i (00:04:32) zoom out -0.8315 -0.1635 \i (00:05:23) prepopup 4.4223 2.3430
\t (00:04:32) Grids are drawn 1.6000, 1.6000 apart for enhanced viewing. \i (00:05:24) oops
\i (00:04:32) trapsize 12753 \t (00:05:24) last pick: 5.0000 2.5000
\i (00:04:33) zoom in 1 \i (00:05:27) ipick 0 -4.5
\i (00:04:33) setwindow pcb \t (00:05:27) last pick: 5.0000 -2.0000
\i (00:04:33) zoom in -3.0198 -0.1634 \i (00:05:59) ipick -10
\t (00:04:33) Grids are drawn 0.8000, 0.8000 apart for enhanced viewing. \t (00:05:59) last pick: -5.0000 -2.0000
\i (00:04:33) trapsize 6377 \i (00:06:01) ipick 0 4.5
\i (00:04:33) zoom in 1 \t (00:06:01) last pick: -5.0000 2.5000
\i (00:04:33) setwindow pcb \i (00:06:02) prepopup -0.5274 -4.0963
\i (00:04:33) zoom in -3.0198 -0.1634 \i (00:06:03) done
\t (00:04:33) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing. \i (00:06:10) shape add rect
\i (00:04:33) trapsize 3188 \i (00:06:21) pick -5 2.5
\i (00:04:33) zoom in 1 \t (00:06:21) last pick: -5.0000 2.5000
\i (00:04:33) setwindow pcb \i (00:06:50) pick 5 1.1
\i (00:04:33) zoom in -3.0197 -0.1634 \t (00:06:50) last pick: 5.0000 1.1000
\t (00:04:33) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing. \i (00:06:56) prepopup 8.0376 -0.4655
\i (00:04:33) trapsize 1594 \i (00:06:57) done
\i (00:04:33) zoom in 1 \i (00:07:01) save
\i (00:04:33) setwindow pcb \e (00:07:01) ERROR(SPMHGE-7): Error(s) occurred, check logfile.
\i (00:04:33) zoom in -3.0197 -0.1634 \i (00:07:03) setwindow text
\i (00:04:33) trapsize 797 \i (00:07:03) close
\i (00:04:34) text edit \i (00:07:04) setwindow pcb
\i (00:04:36) pick grid 8.8725 -2.3154 \i (00:07:04) label refdes
\t (00:04:36) last pick: 8.9000 -2.3000 \t (00:07:04) Pick text location.
\i (00:04:38) setwindow pcb \i (00:07:08) setwindow form.mini
\i (00:04:38) pick grid -9.1412 -2.1082 \i (00:07:08) FORM mini text_name asm
\t (00:04:38) last pick: -9.1000 -2.1000 \i (00:07:11) setwindow pcb
\i (00:04:38) setwindow pcb \i (00:07:11) pick grid -4.7944 -1.7999
\i (00:04:38) pick 8.8725 -2.3154 \t (00:07:11) last pick: -4.8000 -1.8000
\t (00:04:38) Pick text to edit. \t (00:07:11) Enter text string.
\i (00:04:41) setwindow pcb \i (00:07:17) setwindow pcb
\i (00:04:41) prepopup -5.5225 -2.4589 \i (00:07:17) pick -4.8000 -1.8000
\i (00:04:42) done \i (00:07:18) prepopup 5.0119 -3.4756
\i (00:04:42) setwindow pcb \i (00:07:19) next
\i (00:04:42) pick -9.1412 -2.1082 \i (00:07:21) setwindow form.mini
\t (00:04:42) Pick text to edit. \i (00:07:21) FORM mini subclass SILKSCREEN_TOP
\i (00:04:43) setwindow pcb \i (00:07:21) setwindow pcb
\i (00:04:43) save \i (00:07:21) updateport CVPane
\i (00:04:44) fillin yes \i (00:07:26) setwindow form.mini
\t (00:04:44) Symbol 'l298n_with_heat.psm' created. \i (00:07:26) FORM mini text_name ski
\i (00:04:46) step pkg map \i (00:07:27) setwindow pcb
\i (00:04:47) fillin yes \i (00:07:27) pick grid -3.8790 -1.9085
\i (00:04:55) setwindow form.pkgmap3d \t (00:07:27) last pick: -3.9000 -1.9000
\i (00:04:55) FORM pkgmap3d stplist L298N_with_heat.STEP \t (00:07:27) Enter text string.
\i (00:05:51) FORM pkgmap3d rotation_x 90 \i (00:07:30) setwindow pcb
\i (00:05:54) FORM pkgmap3d hide_board YES \i (00:07:30) pick -3.9000 -1.9000
\i (00:05:55) FORM pkgmap3d hide_board NO \i (00:07:31) prepopup -1.7222 -2.6688
\i (00:05:58) FORM pkgmap3d view_orientation Top \i (00:07:31) done
\i (00:06:01) FORM pkgmap3d rotation_z 0.180 \i (00:07:33) move
\i (00:06:04) FORM pkgmap3d rotation_z 180 \t (00:07:33) Select element(s) to move.
\i (00:06:14) FORM pkgmap3d view_orientation Bottom \i (00:07:35) pick grid -3.3979 -1.5206
\i (00:06:41) FORM pkgmap3d offset_y -2 \t (00:07:35) last pick: -3.4000 -1.5000
\i (00:06:43) FORM pkgmap3d offset_y -1 \t (00:07:35) last pick: -3.9000 -1.9000
\i (00:06:47) FORM pkgmap3d offset_y -0.5 \t (00:07:35) Pick new location for the element(s).
\i (00:06:52) FORM pkgmap3d save_current \i (00:07:37) pick grid -4.7634 -1.8619
\i (00:06:53) FORM pkgmap3d done \t (00:07:37) last pick: -4.8000 -1.9000
\i (00:06:54) setwindow pcb \i (00:07:38) prepopup -2.6687 -3.5222
\i (00:06:54) zoom in 1 \i (00:07:38) done
\i (00:06:54) setwindow pcb \i (00:07:52) shape add rect
\i (00:06:54) zoom in 3.6597 1.1917 \i (00:07:57) setwindow form.mini
\i (00:06:54) trapsize 399 \i (00:07:57) FORM mini class 'PACKAGE GEOMETRY'
\i (00:06:54) zoom in 1 \i (00:08:01) setwindow pcb
\i (00:06:54) setwindow pcb \i (00:08:01) zoom in 1
\i (00:06:54) zoom in 3.6597 1.1917 \i (00:08:01) setwindow pcb
\i (00:06:54) trapsize 199 \i (00:08:01) zoom in -4.9961 2.4671
\i (00:06:55) zoom out 1 \i (00:08:01) trapsize 388
\i (00:06:55) setwindow pcb \i (00:08:01) zoom in 1
\i (00:06:55) zoom out 3.8590 0.7095 \i (00:08:01) setwindow pcb
\i (00:06:55) trapsize 399 \i (00:08:01) zoom in -4.9961 2.4672
\i (00:06:55) zoom out 1 \i (00:08:01) trapsize 194
\i (00:06:55) setwindow pcb \i (00:08:01) zoom in 1
\i (00:06:55) zoom out 3.8590 0.7095 \i (00:08:01) setwindow pcb
\i (00:06:55) trapsize 797 \i (00:08:01) zoom in -4.9961 2.4672
\i (00:06:55) zoom out 1 \i (00:08:01) trapsize 97
\i (00:06:55) setwindow pcb \i (00:08:01) zoom in 1
\i (00:06:55) zoom out 3.8589 0.7095 \i (00:08:01) setwindow pcb
\i (00:06:55) trapsize 1594 \i (00:08:01) zoom in -4.9961 2.4672
\i (00:06:55) zoom out 1 \i (00:08:01) trapsize 48
\i (00:06:55) setwindow pcb \i (00:08:03) pick grid -4.9990 2.4992
\i (00:06:55) zoom out 3.8590 0.7094 \t (00:08:03) last pick: -5.0000 2.5000
\t (00:06:55) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing. \i (00:08:04) zoom out 1
\i (00:06:55) trapsize 3188 \i (00:08:04) setwindow pcb
\i (00:06:55) zoom out 1 \i (00:08:04) zoom out -4.8506 2.3673
\i (00:06:55) setwindow pcb \i (00:08:04) trapsize 97
\i (00:06:55) zoom out 3.8590 0.7095 \i (00:08:04) zoom out 1
\t (00:06:55) Grids are drawn 0.8000, 0.8000 apart for enhanced viewing. \i (00:08:04) setwindow pcb
\i (00:06:55) trapsize 6377 \i (00:08:04) zoom out -4.8506 2.3674
\i (00:06:56) zoom in 1 \i (00:08:04) trapsize 194
\i (00:06:56) setwindow pcb \i (00:08:04) zoom out 1
\i (00:06:56) zoom in 1.0533 3.8977 \i (00:08:04) setwindow pcb
\t (00:06:56) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing. \i (00:08:04) zoom out -4.8506 2.3673
\i (00:06:56) trapsize 3188 \i (00:08:04) trapsize 388
\i (00:06:56) zoom in 1 \i (00:08:04) zoom out 1
\i (00:06:56) setwindow pcb \i (00:08:04) setwindow pcb
\i (00:06:56) zoom in 1.0533 3.8977 \i (00:08:04) zoom out -4.8506 2.3674
\t (00:06:56) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing. \i (00:08:04) trapsize 776
\i (00:06:56) trapsize 1594 \i (00:08:04) zoom out 1
\i (00:06:57) zoom in 1 \i (00:08:04) setwindow pcb
\i (00:06:57) setwindow pcb \i (00:08:04) zoom out -4.8505 2.3674
\i (00:06:57) zoom in 1.0533 3.8977 \t (00:08:04) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:06:57) trapsize 797 \i (00:08:04) trapsize 1552
\i (00:06:57) zoom out 1 \i (00:08:05) zoom in 1
\i (00:06:57) setwindow pcb \i (00:08:05) setwindow pcb
\i (00:06:57) zoom out 1.0533 3.8977 \i (00:08:05) zoom in 4.5831 -1.8530
\i (00:06:57) trapsize 1594 \i (00:08:05) trapsize 776
\i (00:08:25) zoom out 1 \i (00:08:05) zoom in 1
\i (00:08:25) setwindow pcb \i (00:08:05) setwindow pcb
\i (00:08:25) zoom out 2.9982 7.0859 \i (00:08:05) zoom in 4.5831 -1.8530
\t (00:08:25) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing. \i (00:08:05) trapsize 388
\i (00:08:25) trapsize 3188 \i (00:08:05) zoom in 1
\i (00:08:25) zoom out 1 \i (00:08:05) setwindow pcb
\i (00:08:25) setwindow pcb \i (00:08:05) zoom in 4.5831 -1.8530
\i (00:08:25) zoom out 2.9982 7.0860 \i (00:08:05) trapsize 194
\t (00:08:25) Grids are drawn 0.8000, 0.8000 apart for enhanced viewing. \i (00:08:06) zoom in 1
\i (00:08:25) trapsize 6377 \i (00:08:06) setwindow pcb
\i (00:08:26) zoom in 1 \i (00:08:06) zoom in 5.0253 -2.0198
\i (00:08:26) setwindow pcb \i (00:08:06) trapsize 97
\i (00:08:26) zoom in 2.6156 5.4281 \i (00:08:06) zoom in 1
\t (00:08:26) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing. \i (00:08:06) setwindow pcb
\i (00:08:26) trapsize 3188 \i (00:08:06) zoom in 5.0253 -2.0198
\i (00:08:26) zoom in 1 \i (00:08:06) trapsize 48
\i (00:08:26) setwindow pcb \i (00:08:06) zoom in 1
\i (00:08:26) zoom in 2.6156 5.4282 \i (00:08:06) setwindow pcb
\t (00:08:26) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing. \i (00:08:06) zoom in 5.0253 -2.0198
\i (00:08:26) trapsize 1594 \i (00:08:06) trapsize 24
\i (00:08:26) zoom in 1 \i (00:08:06) zoom in 1
\i (00:08:26) setwindow pcb \i (00:08:06) setwindow pcb
\i (00:08:26) zoom in 2.6156 5.4282 \i (00:08:06) zoom in 5.0253 -2.0197
\i (00:08:26) trapsize 797 \i (00:08:06) trapsize 12
\i (00:08:30) move \i (00:08:06) zoom in 1
\t (00:08:30) Select element(s) to move. \i (00:08:06) setwindow pcb
\i (00:08:32) pick grid -8.8461 4.2007 \i (00:08:06) zoom in 5.0254 -2.0197
\t (00:08:32) last pick: -8.8000 4.2000 \i (00:08:06) trapsize 6
\t (00:08:32) last pick: -8.8900 4.5500 \i (00:08:09) pick grid 5.0248 -2.0493
\t (00:08:32) Pick new location for the element(s). \t (00:08:09) last pick: 5.0000 -2.0000
\i (00:08:43) ipick 0 5.08 \i (00:08:09) zoom out 1
\t (00:08:43) last pick: -8.8900 9.6300 \i (00:08:09) setwindow pcb
\i (00:08:45) pick grid -7.2520 9.8917 \i (00:08:09) zoom out 5.0482 -2.0266
\t (00:08:45) last pick: -7.3000 9.9000 \i (00:08:09) trapsize 12
\t (00:08:45) last pick: -7.6200 9.6300 \i (00:08:09) zoom out 1
\t (00:08:45) Pick new location for the element(s). \i (00:08:09) setwindow pcb
\i (00:08:50) ipick 0 -5.08 \i (00:08:09) zoom out 5.0482 -2.0265
\t (00:08:50) last pick: -7.6200 4.5500 \i (00:08:09) trapsize 24
\i (00:08:51) pick grid -6.0724 4.8065 \i (00:08:09) zoom out 1
\t (00:08:51) last pick: -6.1000 4.8000 \i (00:08:09) setwindow pcb
\t (00:08:51) last pick: -6.3500 4.5500 \i (00:08:09) zoom out 5.0481 -2.0266
\t (00:08:51) Pick new location for the element(s). \i (00:08:09) trapsize 49
\i (00:08:55) ipick 0 5.08 \i (00:08:09) zoom out 1
\t (00:08:55) last pick: -6.3500 9.6300 \i (00:08:09) setwindow pcb
\i (00:08:56) pick grid -4.3188 9.4773 \i (00:08:09) zoom out 5.0482 -2.0266
\t (00:08:56) last pick: -4.3000 9.5000 \i (00:08:09) trapsize 97
\t (00:08:56) last pick: -5.0800 9.6300 \i (00:08:09) zoom out 1
\t (00:08:56) Pick new location for the element(s). \i (00:08:09) setwindow pcb
\i (00:08:59) ipick 0 -5.08 \i (00:08:09) zoom out 5.0482 -2.0265
\t (00:08:59) last pick: -5.0800 4.5500 \i (00:08:09) trapsize 194
\i (00:09:01) pick grid -3.2189 4.6311 \i (00:08:09) zoom out 1
\t (00:09:01) last pick: -3.2000 4.6000 \i (00:08:09) setwindow pcb
\t (00:09:01) last pick: -3.8100 4.5500 \i (00:08:09) zoom out 5.0483 -2.0265
\t (00:09:01) Pick new location for the element(s). \i (00:08:09) trapsize 388
\i (00:09:05) ipick 0 5.08 \i (00:08:09) zoom out 1
\t (00:09:05) last pick: -3.8100 9.6300 \i (00:08:09) setwindow pcb
\i (00:09:06) pick grid -2.2624 9.7323 \i (00:08:09) zoom out 5.0482 -2.0264
\t (00:09:06) last pick: -2.3000 9.7000 \i (00:08:09) trapsize 776
\t (00:09:06) last pick: -2.5400 9.6300 \i (00:08:09) zoom out 1
\t (00:09:06) Pick new location for the element(s). \i (00:08:09) setwindow pcb
\i (00:09:09) ipick 0 -5.08 \i (00:08:09) zoom out 5.0482 -2.0264
\t (00:09:09) last pick: -2.5400 4.5500 \i (00:08:09) trapsize 1553
\i (00:09:11) pick grid -0.7480 4.8702 \i (00:08:10) prepopup 5.0481 -2.0263
\t (00:09:11) last pick: -0.7000 4.9000 \i (00:08:11) done
\t (00:09:11) last pick: -1.2700 4.5500 \i (00:08:11) zoom in 1
\t (00:09:11) Pick new location for the element(s). \i (00:08:11) setwindow pcb
\i (00:09:13) ipick 0 5.08 \i (00:08:11) zoom in 0.8864 -0.5355
\t (00:09:13) last pick: -1.2700 9.6300 \i (00:08:11) trapsize 776
\i (00:09:15) pick grid 0.5751 8.7758 \i (00:08:11) zoom in 1
\t (00:09:15) last pick: 0.6000 8.8000 \i (00:08:11) setwindow pcb
\t (00:09:15) last pick: 0.6000 8.8000 \i (00:08:11) zoom in 0.8864 -0.5355
\t (00:09:15) Element has no origin, using pick. \i (00:08:11) trapsize 388
\t (00:09:15) Pick new location for the element(s). \i (00:08:12) save
\i (00:09:16) prepopup 0.9258 8.1701 \i (00:08:12) fillin yes
\i (00:09:17) oops \t (00:08:12) Symbol 'to220-3.psm' created.
\t (00:09:17) last pick: 0.6000 8.8000 \i (00:08:16) step pkg map
\i (00:09:17) pick grid -0.0306 9.0628 \i (00:08:17) fillin yes
\t (00:09:17) last pick: 0.0000 9.1000 \i (00:08:24) setwindow form.pkgmap3d
\t (00:09:17) last pick: 0.0000 9.6300 \i (00:08:24) FORM pkgmap3d stplist TO220.step
\t (00:09:17) Pick new location for the element(s). \i (00:08:26) FORM pkgmap3d stplist TS-POINT.STEP
\i (00:09:21) ipick 0 -5.08 \i (00:08:28) FORM pkgmap3d done
\t (00:09:21) last pick: 0.0000 4.5500 \i (00:08:29) setwindow pcb
\i (00:09:22) pick grid 1.8345 4.6789 \i (00:08:29) save
\t (00:09:22) last pick: 1.8000 4.7000 \i (00:08:29) fillin yes
\t (00:09:22) last pick: 1.2700 4.5500 \t (00:08:29) Symbol 'to220-3.psm' created.
\t (00:09:22) Pick new location for the element(s). \i (00:08:30) exit
\i (00:09:25) ipick 0 5.08 \t (00:08:31) Journal end - Thu Aug 8 07:02:32 2024
\t (00:09:25) last pick: 1.2700 9.6300
\i (00:09:29) pick grid 2.7910 9.0787
\t (00:09:29) last pick: 2.8000 9.1000
\t (00:09:29) last pick: 2.5400 9.6300
\t (00:09:29) Pick new location for the element(s).
\i (00:09:32) ipick 0 -5.08
\t (00:09:32) last pick: 2.5400 4.5500
\i (00:09:34) pick grid 4.5286 4.5514
\t (00:09:34) last pick: 4.5000 4.6000
\t (00:09:34) last pick: 3.8100 4.5500
\t (00:09:34) Pick new location for the element(s).
\i (00:09:36) ipick 0 5.08
\t (00:09:36) last pick: 3.8100 9.6300
\i (00:09:38) pick grid 5.5488 9.9555
\t (00:09:38) last pick: 5.5000 10.0000
\t (00:09:38) last pick: 5.0800 9.6300
\t (00:09:38) Pick new location for the element(s).
\i (00:09:40) ipick 0 -5.08
\t (00:09:40) last pick: 5.0800 4.5500
\i (00:09:42) pick grid 6.7125 3.8659
\t (00:09:42) last pick: 6.7000 3.9000
\t (00:09:42) last pick: 6.3500 4.5500
\t (00:09:42) Pick new location for the element(s).
\i (00:09:43) ipick 0 5.08
\t (00:09:43) last pick: 6.3500 9.6300
\i (00:09:45) pick grid 7.8922 9.2222
\t (00:09:45) last pick: 7.9000 9.2000
\t (00:09:45) last pick: 7.6200 9.6300
\t (00:09:45) Pick new location for the element(s).
\i (00:09:49) ipick 0 -5.08
\t (00:09:49) last pick: 7.6200 4.5500
\i (00:09:50) pick grid 9.2791 4.1688
\t (00:09:50) last pick: 9.3000 4.2000
\t (00:09:50) last pick: 8.8900 4.5500
\t (00:09:50) Pick new location for the element(s).
\i (00:09:52) ipick 0 5.08
\t (00:09:52) last pick: 8.8900 9.6300
\i (00:09:53) prepopup 4.2097 12.2670
\i (00:09:54) done
\i (00:09:54) save
\i (00:09:55) fillin yes
\t (00:09:55) Symbol 'l298n_with_heat.psm' created.
\i (00:10:00) step pkg map
\i (00:10:01) fillin yes
\i (00:10:12) setwindow form.pkgmap3d
\i (00:10:12) FORM pkgmap3d hide_board YES
\i (00:10:25) FORM pkgmap3d offset_y -0.7000
\i (00:10:31) FORM pkgmap3d save_current
\i (00:10:33) FORM pkgmap3d view_orientation Right
\i (00:10:38) FORM pkgmap3d view_orientation Top
\i (00:10:40) FORM pkgmap3d hide_board NO
\i (00:10:46) FORM pkgmap3d done
\i (00:10:47) setwindow pcb
\i (00:10:47) save
\i (00:10:48) fillin yes
\t (00:10:48) Symbol 'l298n_with_heat.psm' created.
\i (00:10:49) exit
\t (00:10:49) Journal end - Fri Aug 2 03:32:47 2024

4
thr/downrev.log
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : L298N_with_heat.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 03:32:46 2024 ) ( Date/Time : Thu Aug 8 07:04:28 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

4
thr/downrev.log,1
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : L298N_with_heat.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 03:31:53 2024 ) ( Date/Time : Thu Aug 8 07:02:31 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

4
thr/downrev.log,2
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : L298N_with_heat.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 03:32:46 2024 ) ( Date/Time : Thu Aug 8 07:04:28 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

4
thr/downrev.log,3
View File

@@ -2,9 +2,9 @@
( ) ( )
( Downrev Design ) ( Downrev Design )
( ) ( )
( Drawing : L298N_with_heat.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 03:32:46 2024 ) ( Date/Time : Thu Aug 8 07:04:28 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)

2
thr/master.tag
View File

@@ -1 +1 @@
L298N_with_heat.dra to220-3.dra

128
thr/param_read.log Normal file
View File

@@ -0,0 +1,128 @@
(---------------------------------------------------------------------)
( )
( Parameter File READ )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 06:56:08 2024 )
( )
(---------------------------------------------------------------------)
Paramfile Name : D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : to220-3.dra
Reading...parameter_header:
Reading...db_common_type:
Reading...grid_parms_type:
WARNING: The value of element <etchcount> is not equal to the number of
user defined subclass under ETCH class.
Reading...UnusedPadsSuppressionSettings:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDTOP"
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDBOTTOM"
Reading...art_class_type:
Reading...art_class_type:
Reading...color_table_table:
Reading...ColorParmType:
Reading...profileCustomColors:
Reading...text_size_table:
Reading...drf_parm_type:
Reading...av_parm_type:
Reading...dynfill_parm_type:
Reading...probe_parm_type:
Reading...ifp_parm_type:
Reading...ministat_parm_type:
WARNING: Unmatched Data - Field Name: acon_active_sc , Value: "SIGNEDTOP"
Reading...ats_parm_type:
Reading...placement_parameter_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
..... Total number of errors: 0.
..... Total number of warnings: 4.

9291
thr/stepFacetFiles4Map/TO220-3.xml Normal file
View File

File diff suppressed because it is too large Load Diff

3
thr/stepFacetFiles4Map/stepFileInfo.txt
View File

@@ -10,7 +10,10 @@ CONN-2P.STEP ! 539429 ! 1712710914
thr_dip_2x2.STEP ! 85207 ! 1712840371 thr_dip_2x2.STEP ! 85207 ! 1712840371
thr-R-5W.STEP ! 189951 ! 1720538891 thr-R-5W.STEP ! 189951 ! 1720538891
106125-1mH.STEP ! 11720651 ! 1722176099 106125-1mH.STEP ! 11720651 ! 1722176099
TS-POINT.STEP ! 23849 ! 1710578258
TO220.step ! 185117 ! 1723070957
D8-L.step ! 282667 ! 1568096060 D8-L.step ! 282667 ! 1568096060
TO220-3.step ! 185117 ! 1723070957
thr-3r090tb.step ! 2404583 ! 1711452688 thr-3r090tb.step ! 2404583 ! 1711452688
DIP_2x5.step ! 720870 ! 1710578258 DIP_2x5.step ! 720870 ! 1710578258
SQP-10W100.STEP ! 86485 ! 1722196775 SQP-10W100.STEP ! 86485 ! 1722196775

2
thr/stepFacetFiles4Map/stepFileInfo.txt,1
View File

@@ -10,6 +10,8 @@ CONN-2P.STEP ! 539429 ! 1712710914
thr_dip_2x2.STEP ! 85207 ! 1712840371 thr_dip_2x2.STEP ! 85207 ! 1712840371
thr-R-5W.STEP ! 189951 ! 1720538891 thr-R-5W.STEP ! 189951 ! 1720538891
106125-1mH.STEP ! 11720651 ! 1722176099 106125-1mH.STEP ! 11720651 ! 1722176099
TS-POINT.STEP ! 23849 ! 1710578258
TO220.step ! 185117 ! 1723070957
D8-L.step ! 282667 ! 1568096060 D8-L.step ! 282667 ! 1568096060
thr-3r090tb.step ! 2404583 ! 1711452688 thr-3r090tb.step ! 2404583 ! 1711452688
DIP_2x5.step ! 720870 ! 1710578258 DIP_2x5.step ! 720870 ! 1710578258

BIN
thr/to220-3.dra Normal file
View File

Binary file not shown.

8
chip/sop-16.log,2 → thr/to220-3.log
View File

@@ -2,16 +2,16 @@
( ) ( )
( CREATE SYMBOL ) ( CREATE SYMBOL )
( ) ( )
( Drawing : sop-16.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 05:16:38 2024 ) ( Date/Time : Thu Aug 8 07:04:28 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Create Symbol of type: PACKAGE Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/chip Directory = D:/workspace/GitHub/pcb_lib/thr
Name = sop-16.psm Name = to220-3.psm
User = XerolySkinner User = XerolySkinner
Machine = LAPTOP-XEROLYSK Machine = LAPTOP-XEROLYSK

8
chip/ssop-4.log,1 → thr/to220-3.log,1
View File

@@ -2,16 +2,16 @@
( ) ( )
( CREATE SYMBOL ) ( CREATE SYMBOL )
( ) ( )
( Drawing : ssop-4.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 22:06:23 2024 ) ( Date/Time : Thu Aug 8 07:01:03 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Create Symbol of type: PACKAGE Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/chip Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/thr
Name = ssop-4.psm Name = to220-3.psm
User = XerolySkinner User = XerolySkinner
Machine = LAPTOP-XEROLYSK Machine = LAPTOP-XEROLYSK

8
chip/sop-16.log,3 → thr/to220-3.log,2
View File

@@ -2,16 +2,16 @@
( ) ( )
( CREATE SYMBOL ) ( CREATE SYMBOL )
( ) ( )
( Drawing : sop-16.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 06:00:53 2024 ) ( Date/Time : Thu Aug 8 07:02:14 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Create Symbol of type: PACKAGE Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/chip Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/thr
Name = sop-16.psm Name = to220-3.psm
User = XerolySkinner User = XerolySkinner
Machine = LAPTOP-XEROLYSK Machine = LAPTOP-XEROLYSK

8
chip/sop-16.log,1 → thr/to220-3.log,3
View File

@@ -2,16 +2,16 @@
( ) ( )
( CREATE SYMBOL ) ( CREATE SYMBOL )
( ) ( )
( Drawing : sop-16.dra ) ( Drawing : to220-3.dra )
( Software Version : 17.4S035 ) ( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 04:47:13 2024 ) ( Date/Time : Thu Aug 8 07:02:31 2024 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
Create Symbol of type: PACKAGE Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/chip Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/thr
Name = sop-16.psm Name = to220-3.psm
User = XerolySkinner User = XerolySkinner
Machine = LAPTOP-XEROLYSK Machine = LAPTOP-XEROLYSK

BIN
thr/to220-3.psm Normal file
View File

Binary file not shown.