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XerolySkinner
2024-04-09 00:31:47 +08:00
parent 0f4d465beb
commit cc74dafad2
39 changed files with 63670 additions and 1 deletions
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(ExpressProject "template"
(ProjectVersion "19981106")
(SoftwareVersion "17.4-2019 S035 (4083846) [1/14/2023]-[04/08/24]")
(ProjectType "PCB")
(Folder "Design Resources"
(Folder "Library")
("Allegro Netlist Directory" "allegro")
(DOCKED "TRUE")
(DOCKING_POSITION "59420")
(NoModify)
(File ".\template.dsn"
(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x"))
(Folder "Layout")
(Folder "Outputs")
(Folder "Referenced Projects")
(Folder "PSpice Resources"
(Folder "Simulation Profiles")
(Folder "Model Libraries"
(Sort User))
(Folder "Stimulus Files"
(Sort User))
(Folder "Include Files"
(Sort User)))
(Folder "Logs")
(PartMRUSelector)
(GlobalState
(FileView
(Path "Design Resources")
(Path "Design Resources"
"d:\workspace\github\pcb_lib\orcad_template\template.dsn")
(Path "Design Resources"
"d:\workspace\github\pcb_lib\orcad_template\template.dsn" "TEMPLATE")
(Select "Design Resources"
"d:\workspace\github\pcb_lib\orcad_template\template.dsn" "TEMPLATE"
"1:POWER"))
(HierarchyView)
(Doc
(Type "COrCapturePMDoc")
(Frame
(Placement "44 0 1 -1 -1 -1 -1 0 200 0 620"))
(Tab 0))
(Doc
(Type "COrSchematicDoc")
(Frame
(Placement "44 0 1 -1 -1 -1 -1 5 913 28 666")
(Scroll "0 0")
(Zoom "114")
(Occurrence "/"))
(Path "D:\WORKSPACE\GITHUB\PCB_LIB\ORCAD_TEMPLATE\TEMPLATE.DSN")
(Schematic "TEMPLATE")
(Page "1:POWER"))
(Doc
(Type "COrSchematicDoc")
(Frame
(Placement "44 0 1 -1 -1 -1 -1 5 913 28 666")
(Scroll "0 0")
(Zoom "200")
(Occurrence "/"))
(Path "D:\WORKSPACE\GITHUB\PCB_LIB\ORCAD_TEMPLATE\TEMPLATE.DSN")
(Schematic "TEMPLATE")
(Page "2:USB-CNT")))
(MPSSessionName "XerolySkinner"))

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\t (00:00:02) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:02) Journal start - Mon Apr 8 23:55:40 2024
\t (00:00:02) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=15624 CPUs=12
\t (00:00:02) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\smc\f0603.dra
\t (00:00:02)
(00:00:02) Loading axlcore.cxt
\t (00:00:05) Opening existing design...
\i (00:00:05) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged f0603
\d (00:00:05) Design opened: D:/workspace/GitHub/pcb_lib/smc/f0603.dra
\i (00:00:05) trapsize 431
\i (00:00:06) trapsize 442
\i (00:00:06) trapsize 431
\i (00:00:06) trapsize 378
\i (00:00:06) trapsize 388
\i (00:00:06) trapsize 399
\i (00:00:06) trapsize 512
\i (00:00:10) delete
\i (00:00:12) pick grid 5.0467 0.9783
\t (00:00:12) last pick: 5.0000 1.0000
\t (00:00:12) Text "Approved[1]"
\i (00:00:13) pick grid 5.3131 -0.3948
\t (00:00:13) last pick: 5.3000 -0.4000
\t (00:00:13) Text "*Tested Pass*"
\i (00:00:14) pick grid 6.1226 0.4762
\t (00:00:14) last pick: 6.1000 0.5000
\i (00:00:14) prepopup 6.1226 0.4762
\i (00:00:15) done
\i (00:00:17) text edit
\i (00:00:17) pick grid 1.2451 1.9620
\t (00:00:17) last pick: 1.2000 2.0000
\i (00:00:25) setwindow pcb
\i (00:00:25) pick 1.2451 1.9620
\t (00:00:25) Pick text to edit.
\i (00:00:32) step pkg map
\i (00:00:33) fillin yes
\i (00:00:44) setwindow form.pkgmap3d
\i (00:00:44) FORM pkgmap3d stplist f0603.step
\i (00:00:48) FORM pkgmap3d view_orientation 'Front Left'
\i (00:00:52) FORM pkgmap3d view_orientation Back
\i (00:00:55) FORM pkgmap3d save_current
\i (00:00:57) FORM pkgmap3d done
\i (00:00:58) setwindow pcb
\i (00:00:58) exit
\e (00:00:58) Do you want to save the changes you made to f0603.dra?
\i (00:00:58) fillin yes
\t (00:00:59) Symbol 'f0603.psm' created.
\t (00:00:59) Journal end - Mon Apr 8 23:56:37 2024

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(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : f0603.dra )
( Software Version : 17.4S035 )
( Date/Time : Mon Apr 8 23:56:36 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

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(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : f0603.dra )
( Software Version : 17.4S035 )
( Date/Time : Mon Apr 8 23:56:36 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

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(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : f0603.dra )
( Software Version : 17.4S035 )
( Date/Time : Mon Apr 8 23:56:36 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

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(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : f0603.dra )
( Software Version : 17.4S035 )
( Date/Time : Mon Apr 8 23:56:36 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/smc
Name = f0603.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

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smc/stepFacetFiles4Map/stepFileInfo.txt
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qfn-24.step ! 1567549 ! 1712410006
ID8.STEP ! 399445 ! 1711694856
rp0603.step ! 814212 ! 1711676791
CONN-2P.STEP ! 360048 ! 1712416291
C0603.stp ! 74996 ! 1710578258
ltv-8x7.STEP ! 395538 ! 1712545177
SMA-DO-214AC.step ! 213070 ! 1710578258
SMC.step ! 207133 ! 1710578258
TS-POINT.STEP ! 23849 ! 1710578258
@@ -11,12 +13,14 @@ SOD-123FL.step ! 331135 ! 1710578258
ll34.step ! 547277 ! 1711502096
sot-23-6p.step ! 308752 ! 1712410134
zdyz_imx6ull_core.STEP ! 892431 ! 1712414488
M3x8.step ! 519917 ! 1710578258
sod-323.step ! 94263 ! 1711640831
LED_0603_G.STEP ! 178570 ! 1710578258
SOT-23-5P.step ! 185960 ! 1710578258
KEY_SOT_P2.step ! 151224 ! 1710578258
RES_CRCW_2512.step ! 33456 ! 1568096060
0805.step ! 57849 ! 1568096060
f0603.step ! 196072 ! 1712591701
R0603.step ! 652348 ! 1710578258
STL90N10F7.STEP ! 62745 ! 1711513016
C0805.stp ! 348325 ! 1600360029

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smc/stepFacetFiles4Map/stepFileInfo.txt,1
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qfn-24.step ! 1567549 ! 1712410006
ID8.STEP ! 399445 ! 1711694856
rp0603.step ! 814212 ! 1711676791
CONN-2P.STEP ! 360048 ! 1712416291
C0603.stp ! 74996 ! 1710578258
ltv-8x7.STEP ! 395538 ! 1712545177
SMA-DO-214AC.step ! 213070 ! 1710578258
SMC.step ! 207133 ! 1710578258
TS-POINT.STEP ! 23849 ! 1710578258
SOD-123FL.step ! 331135 ! 1710578258
ll34.step ! 547277 ! 1711502096
sot-23-6p.step ! 308752 ! 1712410134
zdyz_imx6ull_core.STEP ! 1595653 ! 1712412474
zdyz_imx6ull_core.STEP ! 892431 ! 1712414488
M3x8.step ! 519917 ! 1710578258
sod-323.step ! 94263 ! 1711640831
LED_0603_G.STEP ! 178570 ! 1710578258
SOT-23-5P.step ! 185960 ! 1710578258