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pcb_lib/smc/dangling_lines.rpt,1
2024-08-03 22:47:13 +08:00

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( Dangling Line, Via and Antenna Report )
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( Drawing : ll41.dra )
( Software Version : 17.4S035 )
( Date/Time : Sat Aug 3 21:33:58 2024 )
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Report methodology:
- Dangling lines have at least one end not connected.
- Dangling vias have one or no connection
- Plus are not a test, thieving or netshort property via.
- Antenna vias do not have connections on their start and end layers.
- Plus they are not a thieving vias.
- Optionally, VOLTAGE nets, testvias and through vias can be suppressed with
the environment variable report_antennavia.
- Section may be suppressed by variable report_noantennavia.
- Not part of the current partition.
- To suppress items in dangle report add the OK_DANGLE property to the via
or connect line.
<< Summary >>
Total dangling lines: 0
Total dangling vias: 0
Total antenna vias: 0