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更新一个USB插件

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This commit is contained in:
XerolySkinner
2024-10-06 07:11:06 +08:00
parent 1b63732e80
commit 77b70e883e
33 changed files with 20426 additions and 1215 deletions
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basic_lib/BASIC_OBJ.OLB
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hold/downrev.log
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@@ -2,9 +2,9 @@
( )
( Downrev Design )
( )
( Drawing : thr-1r6-2r3.pad )
( Software Version : 17.4S035 )
( Date/Time : Fri Aug 2 01:49:11 2024 )
( Drawing : thr-2r3-3r0.pad )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:45:33 2024 )
( )
(---------------------------------------------------------------------)

17
thr/to220-3.log → hold/downrev.log,1
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@@ -1,23 +1,14 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( Downrev Design )
( )
( Drawing : to220-3.dra )
( Drawing : thr-1r6-2r3.pad )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:04:28 2024 )
( Date/Time : Fri Aug 2 01:49:11 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/thr
Name = to220-3.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.
Changes made to design for 17.2 compatibility.

14
hold/downrev.log,2 Normal file
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@@ -0,0 +1,14 @@
(---------------------------------------------------------------------)
( )
( Downrev Design )
( )
( Drawing : thr-0r92-1r6.pad )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:44:27 2024 )
( )
(---------------------------------------------------------------------)
Changes made to design for 17.2 compatibility.

75
hold/padstack_editor.jrl
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@@ -1,39 +1,36 @@
\t (00:00:01) padstack_editor 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:01) Journal start - Fri Aug 2 01:48:19 2024
\t (00:00:01) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=8148 CPUs=12
\t (00:00:01) CmdLine= d:\software\cadence\spb_17.4\tools\bin\padstack_editor.exe D:\workspace\GitHub\pcb_lib\hold\thr-1r6-2r3.pad
\t (00:00:01)
\d (00:00:03) QtSignal GuidedTabsParent GuidedTabs currentChanged Drill
\d (00:00:06) QtSignal GuidedDrillTab holeXSize editingFinished "1.6000"
\d (00:00:06) QtSignal GuidedTabsParent GuidedDrillTab keyPressEvent 16777220 0 false 1 "
"
\d (00:00:08) QtSignal GuidedTabsParent GuidedTabs currentChanged "Secondary Drill"
\d (00:00:08) QtSignal GuidedTabsParent GuidedTabs currentChanged "Drill Symbol"
\d (00:00:12) QtSignal GuidedDrillSymbol FigureDiameter editingFinished "1.6000"
\d (00:00:13) QtSignal GuidedTabsParent GuidedTabs currentChanged "Drill Offset"
\d (00:00:13) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers"
\d (00:00:14) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 0 "Regular Pad"
\d (00:00:14) QtSignal GuidedDesignLayersTab LayersTable cellClicked 0 "Regular Pad" 0 2
\d (00:00:15) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Regular Pad"
\d (00:00:15) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Regular Pad" 1 2
\d (00:00:16) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 0 "Regular Pad"
\d (00:00:16) QtSignal GuidedDesignLayersTab LayersTable cellClicked 0 "Regular Pad" 0 2
\d (00:00:19) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "2.3000"
\d (00:00:20) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Regular Pad"
\d (00:00:20) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Regular Pad" 1 2
\d (00:00:22) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "2.3000"
\d (00:00:23) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 2 "Regular Pad"
\d (00:00:23) QtSignal GuidedDesignLayersTab LayersTable cellClicked 2 "Regular Pad" 2 2
\d (00:00:25) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "2.3000"
\d (00:00:28) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Thermal Pad"
\d (00:00:28) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Thermal Pad" 1 3
\d (00:00:30) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Anti Pad"
\d (00:00:30) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Anti Pad" 1 4
\d (00:00:36) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "2.4000"
\d (00:00:39) QtSignal GuidedTabsParent GuidedTabs currentChanged "Mask Layers"
\d (00:00:46) QtSignal GuidedMaskLayersTab PadDiameter editingFinished "2.3700"
\d (00:00:47) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged 1 Pad
\d (00:00:47) QtSignal GuidedMaskLayersTab LayersTable cellClicked 1 Pad 1 1
\d (00:00:49) QtSignal GuidedMaskLayersTab PadDiameter editingFinished "2.3700"
\d (00:00:50) QtSignal GuidedTabsParent GuidedTabs currentChanged Options
\d (00:00:53) QtSignal MainWindow Save triggered
\t (00:00:00) padstack_editor 23.1 P001 Windows SPB 64-bit Edition
\t (00:00:00) Journal start - Sun Oct 6 06:44:56 2024
\t (00:00:00) Host=XEROLYSKINNER User=Xeroly Pid=28224 CPUs=16
\t (00:00:00) CmdLine= d:\software\cadence\spb_23.1\tools\bin\padstack_editor.exe D:\Workspace\GitHub\pcb_lib\hold\thr-2r3-3r0.pad
\t (00:00:00)
\d (00:00:02) QtSignal GuidedTabsParent GuidedTabs currentChanged Drill
\d (00:00:04) QtSignal GuidedDrillTab holeXSize editingFinished "2.3000"
\d (00:00:06) QtSignal GuidedTabsParent GuidedTabs currentChanged "Drill Offset"
\d (00:00:07) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers"
\d (00:00:08) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 0 "Regular Pad"
\d (00:00:08) QtSignal GuidedDesignLayersTab LayersTable cellClicked 0 "Regular Pad" 0 2
\d (00:00:11) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "3.0000"
\d (00:00:12) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Regular Pad"
\d (00:00:12) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Regular Pad" 1 2
\d (00:00:14) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "3.0000"
\d (00:00:15) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 2 "Regular Pad"
\d (00:00:15) QtSignal GuidedDesignLayersTab LayersTable cellClicked 2 "Regular Pad" 2 2
\d (00:00:17) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:17) QtSignal 1
\d (00:00:18) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "3.0000"
\d (00:00:19) QtSignal GuidedTabsParent GuidedTabs currentChanged "Mask Layers"
\d (00:00:23) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:23) QtSignal 1
\d (00:00:23) QtSignal GuidedMaskLayersTab PadDiameter editingFinished "3.0000"
\d (00:00:24) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged 1 "Regular Pad"
\d (00:00:24) QtSignal GuidedMaskLayersTab LayersTable cellClicked 1 "Regular Pad" 1 1
\d (00:00:26) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:26) QtSignal 1
\d (00:00:26) QtSignal GuidedMaskLayersTab PadDiameter editingFinished "3.0000"
\d (00:00:28) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged
\d (00:00:30) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers"
\d (00:00:34) QtSignal GuidedTabsParent GuidedTabs currentChanged "Mask Layers"
\d (00:00:35) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers"
\d (00:00:37) QtSignal MainWindow Save triggered
\d (00:00:40) QtSignal MainWindow Exit triggered
\t (00:00:40) Journal end - Sun Oct 6 06:45:36 2024

50
hold/padstack_editor.jrl,1 Normal file
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@@ -0,0 +1,50 @@
\t (00:00:00) padstack_editor 23.1 P001 Windows SPB 64-bit Edition
\t (00:00:00) Journal start - Sun Oct 6 06:43:24 2024
\t (00:00:00) Host=XEROLYSKINNER User=Xeroly Pid=27704 CPUs=16
\t (00:00:00) CmdLine= d:\software\cadence\spb_23.1\tools\bin\padstack_editor.exe D:\Workspace\GitHub\pcb_lib\hold\thr-0r92-1r6.pad
\t (00:00:00)
\d (00:00:02) QtSignal GuidedTabsParent GuidedTabs currentChanged Drill
\d (00:00:05) QtSignal GuidedTabsParent GuidedDrillTab keyPressEvent 16777248 33554432 false 1
\d (00:00:09) QtSignal GuidedDrillTab holeXSize editingFinished "0.9200"
\d (00:00:14) QtSignal GuidedTabsParent GuidedTabs currentChanged "Secondary Drill"
\d (00:00:15) QtSignal GuidedTabsParent GuidedTabs currentChanged "Drill Symbol"
\d (00:00:20) QtSignal GuidedDrillSymbol FigureDiameter editingFinished "0.9200"
\d (00:00:21) QtSignal GuidedTabsParent GuidedTabs currentChanged "Drill Offset"
\d (00:00:22) QtSignal GuidedTabsParent GuidedTabs currentChanged "Design Layers"
\d (00:00:23) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 0 "Regular Pad"
\d (00:00:23) QtSignal GuidedDesignLayersTab LayersTable cellClicked 0 "Regular Pad" 0 2
\d (00:00:26) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "1.6000"
\d (00:00:27) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Regular Pad"
\d (00:00:28) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Regular Pad" 1 2
\d (00:00:30) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "1.6000"
\d (00:00:31) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 2 "Regular Pad"
\d (00:00:31) QtSignal GuidedDesignLayersTab LayersTable cellClicked 2 "Regular Pad" 2 2
\d (00:00:33) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:33) QtSignal 1
\d (00:00:35) QtSignal GuidedDesignLayersTab PadDiameter editingFinished "1.6000"
\d (00:00:37) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Thermal Pad"
\d (00:00:37) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Thermal Pad" 1 3
\d (00:00:40) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Thermal Pad" 1 3
\d (00:00:41) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Thermal Pad" 1 3
\d (00:00:41) QtSignal GuidedDesignLayersTab LayersTable customContextMenuRequest 1 "Thermal Pad"
\d (00:00:43) QtFillin ""
\d (00:00:43) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Thermal Pad" 1 3
\d (00:00:43) QtSignal GuidedDesignLayersTab LayersTable cellDoubleClicked 1 "Thermal Pad" 1 3
\d (00:00:44) QtSignal GuidedTabsParent GuidedDesignLayersTab keyPressEvent 16777223 0 false 1 ""
\d (00:00:49) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged 1 "Anti Pad"
\d (00:00:49) QtSignal GuidedDesignLayersTab LayersTable cellClicked 1 "Anti Pad" 1 4
\d (00:00:51) QtSignal GuidedDesignLayersTab LayersTable itemSelectionChanged
\d (00:00:52) QtSignal GuidedTabsParent GuidedTabs currentChanged "Mask Layers"
\d (00:00:53) QtSignal GuidedMaskLayersTab LayersTable cellClicked 0 "Regular Pad" 0 1
\d (00:00:55) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:00:55) QtSignal 1
\d (00:00:56) QtSignal GuidedMaskLayersTab PadDiameter editingFinished "1.6000"
\d (00:00:58) QtSignal GuidedMaskLayersTab LayersTable itemSelectionChanged 1 "Regular Pad"
\d (00:00:58) QtSignal GuidedMaskLayersTab LayersTable cellClicked 1 "Regular Pad" 1 1
\d (00:01:00) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777248 33554432 false +
\d (00:01:00) QtSignal 1
\d (00:01:01) QtSignal GuidedMaskLayersTab PadDiameter editingFinished "1.6000"
\d (00:01:01) QtSignal GuidedTabsParent GuidedMaskLayersTab keyPressEvent 16777220 0 false 1 "
"
\d (00:01:02) QtSignal MainWindow Save triggered
\d (00:01:04) QtSignal MainWindow Exit triggered

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hold/thr-0r92-1r6.pad Normal file
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hold/thr-2r3-3r0.pad Normal file
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57
smc/allegro.jrl
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@@ -1,32 +1,25 @@
\t (00:00:03) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:03) Journal start - Sat Aug 3 21:35:27 2024
\t (00:00:03) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=9888 CPUs=12
\t (00:00:03) CmdLine= D:\SOFTWARE\Cadence\SPB_17.4\tools\bin\allegro.exe
\t (00:00:03)
(00:00:03) Loading axlcore.cxt
\t (00:00:05) Opening existing design...
\i (00:00:05) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged ll41
\d (00:00:05) Design opened: D:/workspace/GitHub/pcb_lib/smc/ll41.dra
\i (00:00:06) trapsize 335
\i (00:00:06) trapsize 344
\i (00:00:06) trapsize 335
\i (00:00:06) trapsize 294
\i (00:00:06) trapsize 302
\i (00:00:06) trapsize 310
\i (00:00:06) trapsize 319
\i (00:00:09) open
\i (00:00:19) fillin "D:/workspace/Cadence/step-motor/allegro/motor.brd"
\i (00:00:19) cd "D:/workspace/Cadence/step-motor/allegro"
\t (00:00:20) Opening existing design...
\t (00:00:20) Grids are drawn 0.6400, 0.6400 apart for enhanced viewing.
\i (00:00:20) trapsize 5519
\i (00:00:20) trapsize 5655
\t (00:00:20) Grids are drawn 327.6800, 327.6800 apart for enhanced viewing.
\t (00:00:20) Grids are drawn 0.6400, 0.6400 apart for enhanced viewing.
\i (00:00:20) trapsize 6134
\i (00:00:20) setwindow form.mini
\i (00:00:20) FORM mini tree 'Components by refdes'
\i (00:00:20) setwindow pcb
\i (00:00:20) trapsize 6134
\t (00:00:20) > Sending response DoneOpenBoard
\t (00:00:20) Journal end - Sat Aug 3 21:35:45 2024
\t (00:00:01) allegro 23.1 P001 Windows SPB 64-bit Edition
\t (00:00:01) Journal start - Sun Oct 6 07:10:23 2024
\t (00:00:01) Host=XEROLYSKINNER User=Xeroly Pid=29456 CPUs=16
\t (00:00:01) CmdLine= D:\software\Cadence\SPB_23.1\tools\bin\allegro.exe
\t (00:00:01)
(00:00:01) Loading axlcore.cxt
\t (00:00:04) Opening existing design...
\i (00:00:04) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged ll41
\d (00:00:04) Design opened: D:/Workspace/GitHub/pcb_lib/smc/ll41.dra
\i (00:00:04) trapsize 361
\i (00:00:04) trapsize 371
\i (00:00:04) trapsize 361
\i (00:00:04) trapsize 407
\i (00:00:04) trapsize 280
\i (00:00:05) generaledit
\i (00:00:10) open
\i (00:00:28) fillin "D:/Workspace/Cadence/makoto/allegro/makoto.brd"
\i (00:00:28) cd "D:/Workspace/Cadence/makoto/allegro"
\t (00:00:28) Opening existing design...
\i (00:00:29) trapsize 11214
\i (00:00:29) trapsize 11434
\t (00:00:29) Grids are drawn 650.2400, 650.2400 apart for enhanced viewing.
\i (00:00:29) trapsize 11555
\t (00:00:29) > Sending response DoneOpenBoard
\t (00:00:29) Journal end - Sun Oct 6 07:10:51 2024

725
smc/allegro.jrl,1
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@@ -1,708 +1,17 @@
\t (00:00:03) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:03) Journal start - Sat Aug 3 21:13:49 2024
\t (00:00:03) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=15968 CPUs=12
\t (00:00:03) CmdLine= D:\SOFTWARE\Cadence\SPB_17.4\tools\bin\allegro.exe
\t (00:00:03)
(00:00:03) Loading axlcore.cxt
\t (00:00:05) Opening existing design...
\i (00:00:05) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged ll34
\d (00:00:05) Design opened: D:/workspace/GitHub/pcb_lib/smc/ll34.dra
\i (00:00:06) trapsize 353
\i (00:00:06) trapsize 362
\i (00:00:06) trapsize 353
\i (00:00:06) trapsize 310
\i (00:00:06) trapsize 318
\i (00:00:06) trapsize 327
\i (00:00:06) trapsize 336
\i (00:00:10) new
\i (00:00:18) newdrawfillin "ll41.dra" "Package Symbol"
\t (00:00:18) Starting new design...
\i (00:00:19) trapsize 1716
\i (00:00:19) trapsize 1758
\i (00:00:19) trapsize 1716
\t (00:00:19) Grids are drawn 81.2800, 81.2800 apart for enhanced viewing.
\i (00:00:19) trapsize 2572
\i (00:00:19) trapsize 2572
\i (00:00:19) trapsize 2483
\i (00:00:23) param in
\i (00:00:24) setwindow form.parm_in
\i (00:00:24) FORM parm_in browse
\i (00:00:28) fillin "D:/workspace/GitHub/pcb_lib/XerolySkinner.prm"
\i (00:00:29) FORM parm_in execute
\t (00:00:29) Starting Importing parameter file...
\w (00:00:29) WARNING(SPMHGE-269): param in had warnings, use Viewlog to review the log file.
\t (00:00:29) Opening existing design...
\i (00:00:29) setwindow pcb
\i (00:00:29) trapsize 2572
\i (00:00:29) trapsize 2668
\i (00:00:29) trapsize 2572
\i (00:00:30) trapsize 2572
\i (00:00:30) trapsize 2483
\i (00:00:31) setwindow text
\i (00:00:31) close
\i (00:00:32) setwindow form.parm_in
\i (00:00:32) FORM parm_in cancel
\i (00:00:33) setwindow pcb
\i (00:00:33) zoom in 1
\i (00:00:33) setwindow pcb
\i (00:00:33) zoom in -0.2234 -0.1241
\i (00:00:33) trapsize 1241
\i (00:00:36) zoom in 1
\i (00:00:36) setwindow pcb
\i (00:00:36) zoom in -1.3654 0.3725
\i (00:00:36) trapsize 621
\i (00:00:36) zoom in 1
\i (00:00:36) setwindow pcb
\i (00:00:36) zoom in -1.3654 0.3725
\i (00:00:36) trapsize 310
\i (00:00:36) zoom in 1
\i (00:00:36) setwindow pcb
\i (00:00:36) zoom in -1.3653 0.3725
\i (00:00:36) trapsize 155
\i (00:00:36) zoom out 1
\i (00:00:36) setwindow pcb
\i (00:00:36) zoom out 0.0498 -0.0371
\i (00:00:36) trapsize 310
\i (00:00:36) zoom out 1
\i (00:00:36) setwindow pcb
\i (00:00:36) zoom out 0.0498 -0.0371
\i (00:00:37) trapsize 621
\i (00:00:37) zoom out 1
\i (00:00:37) setwindow pcb
\i (00:00:37) zoom out 0.0498 -0.0372
\i (00:00:37) trapsize 1241
\i (00:00:37) zoom out 1
\i (00:00:37) setwindow pcb
\i (00:00:37) zoom out 0.0498 -0.0371
\i (00:00:37) trapsize 2483
\i (00:00:38) zoom in 1
\i (00:00:38) setwindow pcb
\i (00:00:38) zoom in -1.0179 -0.5710
\i (00:00:38) trapsize 1241
\i (00:00:41) add pin
\i (00:00:44) setwindow form.mini
\i (00:00:44) FORM mini pad_name ll41
\t (00:00:44) Using 'LL41.pad'.
\i (00:00:47) FORM mini text_name pin
\i (00:00:49) FORM mini x_count 2
\i (00:01:03) FORM mini x_spacing 3.7500
\i (00:01:10) FORM mini rotate_pin 0.000
\t (00:01:10) Using 'LL41.pad'.
\i (00:01:24) setwindow pcb
\i (00:01:24) pick 0 -1.875
\t (00:01:24) last pick: 0.0000 -1.8750
\t (00:01:24) Using 'LL41.pad'.
\i (00:01:26) prepopup 5.8839 -0.3227
\i (00:01:26) oops
\t (00:01:26) Using 'LL41.pad'.
\i (00:01:30) setwindow form.mini
\i (00:01:30) FORM mini next_pin_number 1
\i (00:01:34) setwindow pcb
\i (00:01:34) pick -1.875 0
\t (00:01:34) last pick: -1.8750 0.0000
\t (00:01:34) Using 'LL41.pad'.
\i (00:01:35) prepopup 7.4727 2.5323
\i (00:01:36) done
\t (00:01:36) Exiting from Add Pin.
\i (00:01:37) zoom in 1
\i (00:01:37) setwindow pcb
\i (00:01:37) zoom in -1.0178 -0.6207
\i (00:01:37) trapsize 621
\i (00:01:37) zoom in 1
\i (00:01:37) setwindow pcb
\i (00:01:37) zoom in -1.0178 -0.6207
\i (00:01:37) trapsize 310
\i (00:01:37) zoom out 1
\i (00:01:37) setwindow pcb
\i (00:01:37) zoom out -0.2916 -0.9621
\i (00:01:37) trapsize 621
\i (00:01:37) zoom out 1
\i (00:01:37) setwindow pcb
\i (00:01:37) zoom out -0.2915 -0.9620
\i (00:01:37) trapsize 1241
\i (00:01:43) define grid
\t (00:01:43) Spacing fields allow simple equations to aid calculations; prefix with =
\i (00:01:44) setwindow form.grid
\i (00:01:44) FORM grid non_etch non_etch_x_grids 0.01
\i (00:01:45) FORM grid non_etch non_etch_y_grids 0.01
\i (00:01:46) FORM grid done
\i (00:01:49) setwindow pcb
\i (00:01:49) prmed
\i (00:01:51) setwindow form.prmedit
\i (00:01:51) FORM prmedit design
\i (00:01:53) FORM prmedit cancel
\i (00:01:55) setwindow pcb
\i (00:01:55) define grid
\t (00:01:55) Spacing fields allow simple equations to aid calculations; prefix with =
\i (00:01:59) setwindow form.grid
\i (00:01:59) FORM grid all_etch all_etch_x_grids 0.1
\i (00:02:00) FORM grid all_etch all_etch_y_grids 0.1
\i (00:02:00) FORM grid done
\i (00:02:02) setwindow pcb
\i (00:02:02) zoom out 1
\i (00:02:02) setwindow pcb
\i (00:02:02) zoom out -0.5647 0.2793
\t (00:02:02) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:02:02) trapsize 2483
\i (00:02:02) zoom out 1
\i (00:02:02) setwindow pcb
\i (00:02:02) zoom out 4.2453 -0.9186
\i (00:02:02) trapsize 2483
\i (00:02:02) zoom out 1
\i (00:02:02) setwindow pcb
\i (00:02:02) zoom out 4.2453 -0.9186
\i (00:02:02) trapsize 2483
\i (00:02:02) zoom out 1
\i (00:02:02) setwindow pcb
\i (00:02:02) zoom out 4.2453 -0.9186
\i (00:02:02) trapsize 2483
\i (00:02:02) zoom out 1
\i (00:02:02) setwindow pcb
\i (00:02:02) zoom out 4.2453 -0.9186
\i (00:02:02) trapsize 2483
\i (00:02:03) zoom in 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom in 0.3724 0.1738
\i (00:02:03) trapsize 1241
\i (00:02:03) zoom in 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom in 0.3724 0.1738
\i (00:02:03) trapsize 621
\i (00:02:03) zoom in 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom in 0.3724 0.1738
\i (00:02:03) trapsize 310
\i (00:02:03) zoom in 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom in 0.3724 0.1738
\i (00:02:03) trapsize 155
\i (00:02:03) zoom in 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom in 0.3725 0.1739
\i (00:02:03) trapsize 78
\i (00:02:03) zoom in 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom in 0.3725 0.1739
\i (00:02:03) trapsize 39
\i (00:02:03) zoom out 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom out 0.3725 0.1739
\i (00:02:03) trapsize 78
\i (00:02:03) zoom out 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom out 0.3725 0.1739
\i (00:02:03) trapsize 155
\i (00:02:03) zoom out 1
\i (00:02:03) setwindow pcb
\i (00:02:03) zoom out 0.3726 0.1740
\i (00:02:03) trapsize 310
\i (00:02:05) label refdes
\t (00:02:05) Grids are drawn 0.0400, 0.0400 apart for enhanced viewing.
\t (00:02:05) Pick text location.
\i (00:02:09) setwindow form.mini
\i (00:02:09) FORM mini text_name asm
\i (00:02:10) setwindow pcb
\i (00:02:10) pick 0 0
\t (00:02:10) last pick: 0.0000 0.0000
\t (00:02:10) Enter text string.
\i (00:02:12) setwindow pcb
\i (00:02:12) pick 0.0000 0.0000
\i (00:02:13) setwindow pcb
\i (00:02:13) prepopup 3.2460 1.8124
\i (00:02:14) next
\i (00:02:15) setwindow form.mini
\i (00:02:15) FORM mini subclass SILKSCREEN_TOP
\i (00:02:15) setwindow pcb
\i (00:02:15) updateport CVPane
\i (00:02:20) setwindow form.mini
\i (00:02:20) FORM mini text_name ski
\i (00:02:22) setwindow pcb
\i (00:02:22) pick 0 0
\t (00:02:22) last pick: 0.0000 0.0000
\t (00:02:22) Enter text string.
\i (00:02:23) setwindow pcb
\i (00:02:23) pick 0.0000 0.0000
\i (00:02:24) setwindow pcb
\i (00:02:24) prepopup 4.6796 1.5517
\i (00:02:24) done
\i (00:02:25) zoom out 1
\i (00:02:25) setwindow pcb
\i (00:02:25) zoom out 4.6610 0.3601
\t (00:02:25) Grids are drawn 0.0800, 0.0800 apart for enhanced viewing.
\i (00:02:25) trapsize 621
\i (00:02:28) add line
\i (00:02:33) setwindow form.mini
\i (00:02:33) FORM mini class 'PACKAGE GEOMETRY'
\i (00:02:36) FORM mini subclass SILKSCREEN_TOP
\i (00:02:36) setwindow pcb
\i (00:02:36) updateport CVPane
\i (00:02:39) setwindow form.mini
\i (00:02:39) FORM mini line_width 0.1500
\i (00:02:41) setwindow pcb
\i (00:02:41) zoom in 1
\i (00:02:41) setwindow pcb
\i (00:02:41) zoom in 0.4408 0.6580
\t (00:02:41) Grids are drawn 0.0400, 0.0400 apart for enhanced viewing.
\i (00:02:41) trapsize 310
\i (00:02:42) zoom in 1
\i (00:02:42) setwindow pcb
\i (00:02:42) zoom in 2.6813 1.0428
\t (00:02:42) Grids are drawn 0.0200, 0.0200 apart for enhanced viewing.
\i (00:02:42) trapsize 155
\i (00:02:42) zoom in 1
\i (00:02:42) setwindow pcb
\i (00:02:42) zoom in 2.6813 1.0428
\i (00:02:42) trapsize 78
\i (00:02:42) zoom in 1
\i (00:02:42) setwindow pcb
\i (00:02:42) zoom in 2.5479 1.0257
\i (00:02:42) trapsize 39
\i (00:02:44) zoom in 1
\i (00:02:44) setwindow pcb
\i (00:02:44) zoom in 2.5410 1.0436
\i (00:02:44) trapsize 19
\i (00:02:44) zoom in 1
\i (00:02:44) setwindow pcb
\i (00:02:44) zoom in 2.5410 1.0436
\i (00:02:44) trapsize 10
\i (00:02:47) pick grid 2.5304 1.0305
\t (00:02:47) last pick: 2.5300 1.0300
\i (00:02:47) prepopup 2.5211 1.0328
\i (00:02:48) oops
\i (00:02:50) pick grid 2.5399 1.0408
\t (00:02:50) last pick: 2.5400 1.0400
\i (00:02:50) prepopup 2.5399 1.0408
\i (00:02:51) oops
\i (00:02:54) define grid
\t (00:02:54) Spacing fields allow simple equations to aid calculations; prefix with =
\i (00:02:56) setwindow form.grid
\i (00:02:56) FORM grid non_etch non_etch_x_grids 0.1
\i (00:02:56) FORM grid non_etch non_etch_y_grids 0.1
\i (00:02:57) FORM grid done
\i (00:02:58) setwindow pcb
\i (00:02:58) zoom out 1
\i (00:02:58) setwindow pcb
\i (00:02:58) zoom out 2.5145 1.0293
\i (00:02:58) trapsize 19
\i (00:02:58) zoom out 1
\i (00:02:58) setwindow pcb
\i (00:02:58) zoom out 2.5145 1.0293
\i (00:02:58) trapsize 39
\i (00:02:58) zoom out 1
\i (00:02:58) setwindow pcb
\i (00:02:58) zoom out 2.5146 1.0293
\i (00:02:58) trapsize 78
\i (00:02:59) pick grid 2.6061 1.1086
\t (00:02:59) last pick: 2.6000 1.1000
\i (00:03:00) zoom out 1
\i (00:03:00) setwindow pcb
\i (00:03:00) zoom out 2.6853 1.0124
\i (00:03:00) trapsize 155
\i (00:03:00) zoom out 1
\i (00:03:00) setwindow pcb
\i (00:03:00) zoom out 2.6853 1.0123
\i (00:03:00) trapsize 310
\i (00:03:00) zoom out 1
\i (00:03:00) setwindow pcb
\i (00:03:00) zoom out 2.6852 1.0124
\i (00:03:00) trapsize 621
\i (00:03:01) zoom in 1
\i (00:03:01) setwindow pcb
\i (00:03:01) zoom in -2.8390 1.3847
\i (00:03:01) trapsize 310
\i (00:03:01) zoom in 1
\i (00:03:01) setwindow pcb
\i (00:03:01) zoom in -2.8390 1.3848
\i (00:03:01) trapsize 155
\i (00:03:01) zoom in 1
\i (00:03:01) setwindow pcb
\i (00:03:01) zoom in -2.8390 1.3848
\i (00:03:01) trapsize 78
\i (00:03:02) pick grid -2.5503 1.1086
\t (00:03:02) last pick: -2.6000 1.1000
\i (00:03:03) zoom out 1
\i (00:03:03) setwindow pcb
\i (00:03:03) zoom out -2.5938 1.2871
\i (00:03:03) trapsize 155
\i (00:03:03) zoom out 1
\i (00:03:03) setwindow pcb
\i (00:03:03) zoom out -2.5938 1.2870
\i (00:03:03) trapsize 310
\i (00:03:03) zoom out 1
\i (00:03:03) setwindow pcb
\i (00:03:03) zoom out -2.5937 1.2870
\i (00:03:03) trapsize 621
\i (00:03:03) zoom out 1
\i (00:03:03) setwindow pcb
\i (00:03:03) zoom out -2.5937 1.2870
\i (00:03:03) trapsize 1241
\i (00:03:04) zoom in 1
\i (00:03:04) setwindow pcb
\i (00:03:04) zoom in -2.4944 -1.1709
\i (00:03:04) trapsize 621
\i (00:03:04) zoom in 1
\i (00:03:04) setwindow pcb
\i (00:03:04) zoom in -2.4943 -1.1708
\i (00:03:04) trapsize 310
\i (00:03:04) zoom in 1
\i (00:03:04) setwindow pcb
\i (00:03:04) zoom in -2.4943 -1.1708
\i (00:03:04) trapsize 155
\i (00:03:04) zoom in 1
\i (00:03:04) setwindow pcb
\i (00:03:04) zoom in -2.4942 -1.1707
\i (00:03:04) trapsize 78
\i (00:03:04) zoom in 1
\i (00:03:04) setwindow pcb
\i (00:03:04) zoom in -2.4942 -1.1707
\i (00:03:04) trapsize 39
\i (00:03:06) pick grid -2.5702 -1.0512
\t (00:03:06) last pick: -2.6000 -1.1000
\i (00:03:06) zoom out 1
\i (00:03:06) setwindow pcb
\i (00:03:06) zoom out -2.7060 -1.2025
\i (00:03:06) trapsize 78
\i (00:03:06) zoom out 1
\i (00:03:06) setwindow pcb
\i (00:03:06) zoom out -2.7059 -1.2025
\i (00:03:06) trapsize 155
\i (00:03:07) zoom out 1
\i (00:03:07) setwindow pcb
\i (00:03:07) zoom out -2.0728 -1.3142
\i (00:03:07) trapsize 310
\i (00:03:07) zoom out 1
\i (00:03:07) setwindow pcb
\i (00:03:07) zoom out -2.0728 -1.3142
\i (00:03:07) trapsize 621
\i (00:03:08) zoom in 1
\i (00:03:08) setwindow pcb
\i (00:03:08) zoom in 2.9425 -1.1528
\i (00:03:08) trapsize 310
\i (00:03:08) zoom in 1
\i (00:03:08) setwindow pcb
\i (00:03:08) zoom in 2.9426 -1.1528
\i (00:03:08) trapsize 155
\i (00:03:08) zoom in 1
\i (00:03:08) setwindow pcb
\i (00:03:08) zoom in 2.9426 -1.1528
\i (00:03:08) trapsize 78
\i (00:03:09) pick grid 2.6478 -1.0659
\t (00:03:09) last pick: 2.6000 -1.1000
\i (00:03:09) zoom out 1
\i (00:03:09) setwindow pcb
\i (00:03:09) zoom out 2.6928 -1.2661
\i (00:03:09) trapsize 155
\i (00:03:09) zoom out 1
\i (00:03:09) setwindow pcb
\i (00:03:09) zoom out 2.6929 -1.2660
\i (00:03:09) trapsize 310
\i (00:03:09) zoom out 1
\i (00:03:09) setwindow pcb
\i (00:03:09) zoom out 2.6928 -1.2660
\i (00:03:09) trapsize 621
\i (00:03:10) zoom in 1
\i (00:03:10) setwindow pcb
\i (00:03:10) zoom in 2.5936 1.2043
\i (00:03:10) trapsize 310
\i (00:03:10) zoom in 1
\i (00:03:10) setwindow pcb
\i (00:03:10) zoom in 2.5936 1.2044
\i (00:03:10) trapsize 155
\i (00:03:10) zoom in 1
\i (00:03:10) setwindow pcb
\i (00:03:10) zoom in 2.5936 1.2044
\i (00:03:10) trapsize 78
\i (00:03:11) pick grid 2.6107 1.1486
\t (00:03:11) last pick: 2.6000 1.1000
\i (00:03:11) prepopup 2.6091 1.1222
\i (00:03:12) done
\i (00:03:12) zoom out 1
\i (00:03:12) setwindow pcb
\i (00:03:12) zoom out 2.6045 1.1424
\i (00:03:12) trapsize 155
\i (00:03:12) zoom out 1
\i (00:03:12) setwindow pcb
\i (00:03:12) zoom out 2.6045 1.1423
\i (00:03:12) trapsize 310
\i (00:03:12) zoom out 1
\i (00:03:12) setwindow pcb
\i (00:03:12) zoom out 2.6044 1.1424
\i (00:03:12) trapsize 621
\i (00:03:12) zoom out 1
\i (00:03:12) setwindow pcb
\i (00:03:12) zoom out 2.6045 1.1424
\i (00:03:12) trapsize 1241
\i (00:03:13) zoom in 1
\i (00:03:13) setwindow pcb
\i (00:03:13) zoom in 0.1961 0.0251
\i (00:03:13) trapsize 621
\i (00:03:17) shape add rect
\i (00:03:20) zoom in 1
\i (00:03:20) setwindow pcb
\i (00:03:20) zoom in -0.0646 0.1617
\i (00:03:20) trapsize 310
\i (00:03:20) zoom in 1
\i (00:03:20) setwindow pcb
\i (00:03:20) zoom in -0.0646 0.1617
\i (00:03:20) trapsize 155
\i (00:03:20) zoom in 1
\i (00:03:20) setwindow pcb
\i (00:03:20) zoom in -0.0645 0.1617
\i (00:03:20) trapsize 78
\i (00:03:20) zoom in 1
\i (00:03:20) setwindow pcb
\i (00:03:20) zoom in -0.0645 0.1617
\i (00:03:20) trapsize 39
\i (00:03:20) zoom in 1
\i (00:03:20) setwindow pcb
\i (00:03:20) zoom in -0.0645 0.1617
\i (00:03:20) trapsize 19
\i (00:03:21) zoom out 1
\i (00:03:21) setwindow pcb
\i (00:03:21) zoom out -0.0644 0.1617
\i (00:03:21) trapsize 39
\i (00:03:21) zoom out 1
\i (00:03:21) setwindow pcb
\i (00:03:21) zoom out -0.0645 0.1617
\i (00:03:21) trapsize 78
\i (00:03:22) zoom out 1
\i (00:03:22) setwindow pcb
\i (00:03:22) zoom out -0.0039 0.5000
\i (00:03:22) trapsize 155
\i (00:03:22) zoom out 1
\i (00:03:22) setwindow pcb
\i (00:03:22) zoom out -0.0039 0.5000
\i (00:03:22) trapsize 310
\i (00:03:23) pick grid 0.0457 1.1393
\t (00:03:23) last pick: 0.0000 1.1000
\i (00:03:26) pick grid -2.5922 -1.0580
\t (00:03:26) last pick: -2.6000 -1.1000
\i (00:03:26) prepopup -1.4439 -1.8090
\i (00:03:27) done
\i (00:03:28) save
\t (00:03:28) Symbol 'll41.psm' created.
\i (00:03:30) zoom out 1
\i (00:03:30) setwindow pcb
\i (00:03:30) zoom out -0.8977 -0.6111
\i (00:03:30) trapsize 621
\i (00:03:36) add rect
\i (00:03:38) setwindow form.mini
\i (00:03:38) FORM mini subclass ASSEMBLY_TOP
\i (00:03:38) setwindow pcb
\i (00:03:38) updateport CVPane
\i (00:03:40) zoom in 1
\i (00:03:40) setwindow pcb
\i (00:03:40) zoom in 2.5533 1.0648
\i (00:03:40) trapsize 310
\i (00:03:40) zoom in 1
\i (00:03:40) setwindow pcb
\i (00:03:40) zoom in 2.5533 1.0649
\i (00:03:40) trapsize 155
\i (00:03:40) zoom in 1
\i (00:03:40) setwindow pcb
\i (00:03:40) zoom in 2.5534 1.0649
\i (00:03:40) trapsize 78
\i (00:03:40) zoom in 1
\i (00:03:40) setwindow pcb
\i (00:03:40) zoom in 2.5534 1.0649
\i (00:03:40) trapsize 39
\i (00:03:42) pick grid 2.5845 1.0796
\t (00:03:42) last pick: 2.6000 1.1000
\i (00:03:43) zoom out 1
\i (00:03:43) setwindow pcb
\i (00:03:43) zoom out 2.6039 0.9539
\i (00:03:43) trapsize 78
\i (00:03:43) zoom out 1
\i (00:03:43) setwindow pcb
\i (00:03:43) zoom out 2.6039 0.9540
\i (00:03:43) trapsize 155
\i (00:03:43) zoom out 1
\i (00:03:43) setwindow pcb
\i (00:03:43) zoom out 2.6039 0.9540
\i (00:03:43) trapsize 310
\i (00:03:43) zoom out 1
\i (00:03:43) setwindow pcb
\i (00:03:43) zoom out 2.6039 0.9541
\i (00:03:43) trapsize 621
\i (00:03:44) zoom in 1
\i (00:03:44) setwindow pcb
\i (00:03:44) zoom in -2.6597 -1.1067
\i (00:03:44) trapsize 310
\i (00:03:44) zoom in 1
\i (00:03:44) setwindow pcb
\i (00:03:44) zoom in -2.6597 -1.1067
\i (00:03:44) trapsize 155
\i (00:03:44) zoom in 1
\i (00:03:44) setwindow pcb
\i (00:03:44) zoom in -2.6597 -1.1067
\i (00:03:44) trapsize 78
\i (00:03:45) pick grid -2.5541 -1.1036
\t (00:03:45) last pick: -2.6000 -1.1000
\i (00:03:45) prepopup -2.9095 -1.1284
\i (00:03:46) done
\i (00:03:48) shape add rect
\i (00:03:50) setwindow form.mini
\i (00:03:50) FORM mini subclass PLACE_BOUND_TOP
\i (00:03:50) setwindow pcb
\i (00:03:50) updateport CVPane
\i (00:03:52) pick grid -2.5945 -1.1005
\t (00:03:52) last pick: -2.6000 -1.1000
\i (00:03:52) zoom out 1
\i (00:03:52) setwindow pcb
\i (00:03:52) zoom out -3.1143 -1.4527
\i (00:03:52) trapsize 155
\i (00:03:52) zoom out 1
\i (00:03:52) setwindow pcb
\i (00:03:52) zoom out -3.1143 -1.4527
\i (00:03:52) trapsize 310
\i (00:03:52) zoom out 1
\i (00:03:52) setwindow pcb
\i (00:03:52) zoom out -3.1143 -1.4528
\i (00:03:52) trapsize 621
\i (00:03:52) zoom out 1
\i (00:03:52) setwindow pcb
\i (00:03:52) zoom out -3.1144 -1.4527
\i (00:03:52) trapsize 1241
\i (00:03:53) zoom in 1
\i (00:03:53) setwindow pcb
\i (00:03:53) zoom in 2.5712 0.4838
\i (00:03:53) trapsize 621
\i (00:03:53) zoom in 1
\i (00:03:53) setwindow pcb
\i (00:03:53) zoom in 2.5712 0.4839
\i (00:03:53) trapsize 310
\i (00:03:55) pick grid 2.6147 1.0549
\t (00:03:55) last pick: 2.6000 1.1000
\i (00:03:55) zoom out 1
\i (00:03:55) setwindow pcb
\i (00:03:55) zoom out 4.7685 3.3143
\i (00:03:55) trapsize 621
\i (00:03:56) zoom in 1
\i (00:03:56) setwindow pcb
\i (00:03:56) zoom in 0.4857 0.0245
\i (00:03:56) trapsize 310
\i (00:03:56) zoom in 1
\i (00:03:56) setwindow pcb
\i (00:03:56) zoom in 0.4857 0.0245
\i (00:03:56) trapsize 155
\i (00:03:57) prepopup 0.4857 0.0245
\i (00:03:57) done
\i (00:03:58) zoom out 1
\i (00:03:58) setwindow pcb
\i (00:03:58) zoom out 1.0226 0.5459
\i (00:03:58) trapsize 310
\i (00:03:58) save
\i (00:03:59) fillin yes
\t (00:03:59) Symbol 'll41.psm' created.
\i (00:19:11) save
\i (00:19:11) fillin yes
\t (00:19:12) Symbol 'll41.psm' created.
\i (00:19:15) step pkg map
\i (00:19:16) fillin yes
\i (00:19:19) setwindow form.pkgmap3d
\i (00:19:19) FORM pkgmap3d stplist ll41.STEP
\i (00:19:22) FORM pkgmap3d overlay YES
\i (00:19:25) FORM pkgmap3d offset_z 2
\i (00:19:27) FORM pkgmap3d view_orientation Top
\i (00:19:30) FORM pkgmap3d offset_y -10
\i (00:19:31) FORM pkgmap3d offset_y 0
\i (00:19:33) FORM pkgmap3d offset_x -1
\i (00:19:35) FORM pkgmap3d offset_x 2
\i (00:19:38) FORM pkgmap3d offset_x 1
\i (00:19:39) FORM pkgmap3d offset_x 1.5
\i (00:19:42) FORM pkgmap3d offset_x 1.75
\i (00:19:51) FORM pkgmap3d offset_x 1.8
\i (00:19:55) FORM pkgmap3d view_orientation Back
\i (00:19:58) FORM pkgmap3d offset_z 1
\i (00:20:00) FORM pkgmap3d offset_z 0.9
\i (00:20:02) FORM pkgmap3d offset_z 0.8
\i (00:20:04) FORM pkgmap3d save_current
\i (00:20:05) FORM pkgmap3d done
\i (00:20:07) setwindow pcb
\i (00:20:07) save
\i (00:20:08) fillin yes
\t (00:20:08) Symbol 'll41.psm' created.
\i (00:20:12) 3d
\i (00:20:25) QtSignal pcb3d_SymbolTab pcb3dSymbolTree itemChanged "~All" "|" 0
\i (00:20:25) QtSignal pcb3d_SymbolTab pcb3dSymbolTree itemClicked All
\i (00:20:26) QtSignal pcb3d_SymbolTab pcb3dSymbolTree itemChanged "~All" "|" 2
\i (00:20:26) QtSignal pcb3d_SymbolTab pcb3dSymbolTree itemClicked All
\i (00:20:29) QtSignal pcb3dViewer pcb3dViewer closed
\i (00:20:32) zoom out 1
\i (00:20:32) setwindow pcb
\i (00:20:32) zoom out -1.0505 0.3659
\i (00:20:32) trapsize 621
\i (00:20:32) zoom out 1
\i (00:20:32) setwindow pcb
\i (00:20:32) zoom out -1.0505 0.3659
\i (00:20:32) trapsize 1241
\i (00:20:32) zoom in 1
\i (00:20:32) setwindow pcb
\i (00:20:32) zoom in -1.0505 0.3659
\i (00:20:32) trapsize 621
\i (00:20:32) zoom in 1
\i (00:20:32) setwindow pcb
\i (00:20:32) zoom in -1.0505 0.3659
\i (00:20:32) trapsize 310
\i (00:20:33) zoom in 1
\i (00:20:33) setwindow pcb
\i (00:20:33) zoom in -1.0505 0.3659
\i (00:20:33) trapsize 155
\i (00:20:33) zoom in 1
\i (00:20:33) setwindow pcb
\i (00:20:33) zoom in -1.0505 0.3659
\i (00:20:33) trapsize 78
\i (00:20:33) zoom in 1
\i (00:20:33) setwindow pcb
\i (00:20:33) zoom in -1.0504 0.3659
\i (00:20:33) trapsize 39
\i (00:20:33) zoom out 1
\i (00:20:33) setwindow pcb
\i (00:20:33) zoom out -1.0504 0.3659
\i (00:20:33) trapsize 78
\i (00:20:33) zoom out 1
\i (00:20:33) setwindow pcb
\i (00:20:33) zoom out -1.0503 0.3659
\i (00:20:33) trapsize 155
\i (00:20:33) zoom out 1
\i (00:20:33) setwindow pcb
\i (00:20:33) zoom out -1.0504 0.3659
\i (00:20:33) trapsize 310
\i (00:20:39) shape select
\i (00:20:44) setwindow form.find
\i (00:20:44) FORM find all_off
\i (00:20:45) FORM find all_on
\e (00:20:46) Command not found: deelte
\i (00:20:50) setwindow pcb
\i (00:20:50) color192
\i (00:20:54) QtSignal CVDLayerContainer CVDFilterLayerEntry editingFinished silk
\i (00:20:54) QtSignal CVDLayerContainer CVDVisibilityOff clicked
\i (00:20:55) QtSignal CVDLayerTable VertHeader clickedCheckBox "Silkscreen_Top" 1
\i (00:20:55) QtSignal CVDLayerSplitter CVDLayerTable dataChanged 1 0
\i (00:20:56) QtSignal CVDTabs CVDLayerContainer keyPressEvent 16777248 33554432 false 1
\i (00:20:58) QtSignal CVDLayerContainer CVDFilterLayerEntry editingFinished top
\i (00:20:58) QtSignal CVDLayerTable VertHeader clickedCheckBox Top 1
\i (00:20:58) QtSignal CVDLayerSplitter CVDLayerTable dataChanged 0 0
\i (00:21:00) QtSignal ColorVisibilityDialog CVDOkButton clicked
\i (00:21:05) shape select
\i (00:21:06) pick grid -0.0199 -0.0314
\t (00:21:06) last pick: 0.0000 0.0000
\i (00:21:08) drag_start grid -2.5958 0.1983
\t (00:21:08) last pick: -2.6000 0.1983
\i (00:21:09) drag_stop grid -1.1558 0.1983
\t (00:21:09) No DRC errors detected.
\i (00:21:10) prepopup -0.2993 1.8245
\i (00:21:11) done
\i (00:21:12) color192
\i (00:21:13) QtSignal CVDLayerContainer CVDVisibilityOn clicked
\i (00:21:14) QtSignal ColorVisibilityDialog CVDOkButton clicked
\i (00:21:15) save
\i (00:21:15) fillin yes
\t (00:21:16) Symbol 'll41.psm' created.
\i (00:21:17) 3d
\i (00:21:20) QtSignal pcb3dViewer pcb3dViewer closed
\i (00:21:21) save
\i (00:21:21) fillin yes
\t (00:21:22) Symbol 'll41.psm' created.
\i (00:21:23) exit
\t (00:21:23) Journal end - Sat Aug 3 21:35:09 2024
\t (00:00:01) allegro 23.1 P001 Windows SPB 64-bit Edition
\t (00:00:01) Journal start - Sun Oct 6 07:02:48 2024
\t (00:00:01) Host=XEROLYSKINNER User=Xeroly Pid=25424 CPUs=16
\t (00:00:01) CmdLine= d:\software\cadence\spb_23.1\tools\bin\allegro.exe D:\Workspace\GitHub\pcb_lib\smc\sot-23-3p.dra
\t (00:00:01)
(00:00:01) Loading axlcore.cxt
\t (00:00:04) Opening existing design...
\i (00:00:04) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "sot-23-3p"
\d (00:00:04) Design opened: D:/Workspace/GitHub/pcb_lib/smc/sot-23-3p.dra
\i (00:00:04) trapsize 670
\i (00:00:04) trapsize 689
\i (00:00:04) trapsize 670
\i (00:00:04) trapsize 946
\i (00:00:05) trapsize 651
\i (00:00:05) generaledit
\i (00:02:33) exit
\t (00:02:33) Journal end - Sun Oct 6 07:05:20 2024

703
thr/allegro.jrl
View File

@@ -1,49 +1,654 @@
\t (00:00:03) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:03) Journal start - Thu Aug 8 07:02:55 2024
\t (00:00:03) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=21748 CPUs=12
\t (00:00:03) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\thr\to220-3.dra
\t (00:00:03)
(00:00:03) Loading axlcore.cxt
\t (00:00:05) Opening existing design...
\i (00:00:05) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "to220-3"
\d (00:00:05) Design opened: D:/workspace/GitHub/pcb_lib/thr/to220-3.dra
\i (00:00:06) trapsize 419
\i (00:00:06) trapsize 430
\i (00:00:06) trapsize 419
\i (00:00:06) trapsize 368
\i (00:00:06) trapsize 378
\i (00:00:06) trapsize 388
\i (00:00:06) trapsize 399
\i (00:00:10) step pkg map
\i (00:00:11) fillin yes
\i (00:00:17) setwindow form.pkgmap3d
\i (00:00:17) FORM pkgmap3d stplist TO220-3.step
\i (00:00:20) FORM pkgmap3d rotation_x 90
\i (00:00:22) FORM pkgmap3d rotation_x 0
\i (00:00:23) FORM pkgmap3d rotation_y 90
\i (00:00:25) FORM pkgmap3d overlay YES
\i (00:00:31) FORM pkgmap3d offset_y 10
\i (00:00:32) FORM pkgmap3d offset_y 0
\i (00:00:33) FORM pkgmap3d offset_z 10
\i (00:00:34) FORM pkgmap3d offset_z 20
\i (00:00:36) FORM pkgmap3d hide_board YES
\i (00:00:39) FORM pkgmap3d view_orientation Right
\i (00:00:43) FORM pkgmap3d view_orientation Top
\i (00:00:51) FORM pkgmap3d rotation_z 180
\i (00:00:55) FORM pkgmap3d offset_y -2
\i (00:00:56) FORM pkgmap3d offset_y 2
\i (00:00:58) FORM pkgmap3d offset_y 3
\i (00:01:00) FORM pkgmap3d offset_y 2.5
\i (00:01:03) FORM pkgmap3d view_orientation Right
\i (00:01:08) FORM pkgmap3d view_orientation Bottom
\i (00:01:19) FORM pkgmap3d view_orientation Top
\i (00:01:23) FORM pkgmap3d view_orientation Front
\i (00:01:24) FORM pkgmap3d hide_board NO
\i (00:01:32) FORM pkgmap3d save_current
\i (00:01:33) FORM pkgmap3d done
\i (00:01:35) setwindow pcb
\i (00:01:35) save
\i (00:01:35) fillin yes
\t (00:01:36) Symbol 'to220-3.psm' created.
\i (00:01:46) exit
\t (00:01:47) Journal end - Thu Aug 8 07:04:39 2024
\t (00:00:46) allegro 23.1 P001 Windows SPB 64-bit Edition
\t (00:00:46) Journal start - Sun Oct 6 06:46:32 2024
\t (00:00:46) Host=XEROLYSKINNER User=Xeroly Pid=26792 CPUs=16
\t (00:00:46) CmdLine= D:\software\Cadence\SPB_23.1\tools\bin\allegro.exe
\t (00:00:46)
\t (00:00:46) Starting new design...
\i (00:00:46) trapsize 13729
\i (00:00:47) trapsize 13998
\i (00:00:47) trapsize 13729
\t (00:00:47) Grids are drawn 650.2400, 650.2400 apart for enhanced viewing.
\i (00:00:47) trapsize 21701
\i (00:00:47) trapsize 21701
\i (00:00:47) trapsize 21061
\i (00:00:47) generaledit
\i (00:00:51) param in
\i (00:00:52) setwindow form.parm_in
\i (00:00:52) FORM parm_in browse
\i (00:00:57) fillin "D:/Workspace/GitHub/pcb_lib/XerolySkinner.prm"
\i (00:00:59) FORM parm_in execute
\t (00:00:59) Starting Importing parameter file...
\w (00:00:59) WARNING(SPMHGE-269): param in had warnings, use Viewlog to review the log file.
\t (00:00:59) Opening existing design...
\t (00:00:59) Grids are drawn 2.5400, 2.5400 apart for enhanced viewing.
\i (00:00:59) setwindow pcb
\i (00:00:59) trapsize 21701
\i (00:00:59) trapsize 22381
\i (00:00:59) trapsize 21701
\t (00:00:59) Grids are drawn 2.5400, 2.5400 apart for enhanced viewing.
\i (00:00:59) trapsize 21701
\i (00:00:59) trapsize 21061
\i (00:01:01) setwindow text
\i (00:01:01) close
\i (00:01:02) setwindow form.parm_in
\i (00:01:02) FORM parm_in cancel
\i (00:01:02) setwindow pcb
\i (00:01:02) generaledit
\i (00:01:03) zoom in 1
\i (00:01:03) setwindow pcb
\i (00:01:03) zoom in 1.0531 -6.5291
\t (00:01:03) Grids are drawn 1.2700, 1.2700 apart for enhanced viewing.
\i (00:01:03) trapsize 10531
\i (00:01:03) zoom in 1
\i (00:01:03) setwindow pcb
\i (00:01:03) zoom in -8.0034 -6.5290
\i (00:01:03) trapsize 5265
\i (00:01:03) zoom in 1
\i (00:01:03) setwindow pcb
\i (00:01:03) zoom in -8.0033 -6.5290
\i (00:01:03) trapsize 2633
\i (00:01:03) zoom in 1
\i (00:01:03) setwindow pcb
\i (00:01:03) zoom in -8.0033 -6.5289
\i (00:01:03) trapsize 1316
\i (00:01:04) add pin
\i (00:01:06) setwindow form.mini
\i (00:01:06) FORM mini pad_browse
\i (00:01:09) fillin "menu_cancel"
\i (00:01:21) setwindow pcb
\i (00:01:21) add pin
\t (00:01:21) Exiting from Add Pin.
\i (00:01:22) setwindow form.mini
\i (00:01:22) FORM mini pad_name thr-0r92-1r6
\t (00:01:22) Using 'THR-0R92-1R6.pad'.
\i (00:01:39) setwindow pcb
\i (00:01:39) pick -1 2.71
\t (00:01:39) last pick: -1.0000 2.7100
\t (00:01:39) Using 'THR-0R92-1R6.pad'.
\i (00:01:49) pick 1 2.71
\t (00:01:49) last pick: 1.0000 2.7100
\t (00:01:49) Using 'THR-0R92-1R6.pad'.
\i (00:02:09) pick -3.5 2.71
\t (00:02:09) last pick: -3.5000 2.7100
\t (00:02:09) Using 'THR-0R92-1R6.pad'.
\i (00:02:20) pick 3.5 2.71
\t (00:02:20) last pick: 3.5000 2.7100
\t (00:02:20) Using 'THR-0R92-1R6.pad'.
\i (00:02:30) setwindow form.mini
\i (00:02:30) FORM mini pad_name thr-2r3-3r0
\t (00:02:30) Using 'THR-2R3-3R0.pad'.
\i (00:02:36) FORM mini pintype_mechanical YES
\i (00:02:51) FORM mini x_count 2
\i (00:02:54) FORM mini x_spacing 13.1400
\i (00:03:03) setwindow pcb
\i (00:03:03) pick -6.57
\t (00:03:03) last pick: -6.5700 2.7100
\t (00:03:03) Using 'THR-2R3-3R0.pad'.
\i (00:03:07) prepopup -0.2369 -5.1336
\i (00:03:08) oops
\t (00:03:08) last pick: 3.5000 2.7100
\t (00:03:08) Using 'THR-2R3-3R0.pad'.
\i (00:03:16) pick -6.57 0
\t (00:03:16) last pick: -6.5700 0.0000
\t (00:03:16) Using 'THR-2R3-3R0.pad'.
\i (00:03:17) prepopup 2.0799 -8.5034
\i (00:03:18) done
\t (00:03:18) Exiting from Add Pin.
\i (00:03:18) generaledit
\i (00:03:19) zoom in 1
\i (00:03:19) setwindow pcb
\i (00:03:19) zoom in -0.6054 3.3963
\i (00:03:19) trapsize 658
\i (00:03:19) zoom out 1
\i (00:03:19) setwindow pcb
\i (00:03:19) zoom out -1.8164 0.0002
\i (00:03:19) trapsize 1316
\i (00:03:20) zoom in 1
\i (00:03:20) setwindow pcb
\i (00:03:20) zoom in 0.5530 2.3696
\i (00:03:20) trapsize 658
\i (00:03:36) label refdes
\t (00:03:37) Pick text location.
\i (00:03:37) pick grid -4.0015 2.5671
\t (00:03:37) last pick: -5.0800 2.5400
\t (00:03:37) Enter text string.
\i (00:03:40) setwindow pcb
\i (00:03:40) prepopup -7.9506 6.3186
\i (00:03:41) cancel
\i (00:03:41) generaledit
\i (00:03:42) pick grid -3.9621 2.6724
\t (00:03:42) last pick: -5.0800 2.5400
\i (00:03:44) label refdes
\t (00:03:44) Pick text location.
\i (00:03:45) pick grid -3.7251 2.6460
\t (00:03:45) last pick: -2.5400 2.5400
\t (00:03:45) Enter text string.
\i (00:03:47) setwindow pcb
\i (00:03:47) prepopup -2.2376 1.3034
\i (00:03:48) cancel
\i (00:03:48) generaledit
\i (00:03:54) change
\i (00:03:55) pick grid -4.0279 2.6066
\t (00:03:55) last pick: -5.0800 2.5400
\e (00:03:55) ERROR(SPMHGE-555): Changing pin number to a different subclass is not supported.
\i (00:04:06) setwindow form.mini
\i (00:04:06) FORM mini change_class 'PACKAGE GEOMETRY'
\i (00:04:08) FORM mini change_subclass PIN_NUMBER
\i (00:04:12) FORM mini text_name pin
\i (00:04:13) setwindow pcb
\i (00:04:13) pick grid -3.8567 2.7119
\t (00:04:13) last pick: -5.0800 2.5400
\t (00:04:13) No DRC errors detected.
\t (00:04:13) Changed 1 items out of 1 items found.
\i (00:04:14) pick grid -1.2636 2.6329
\t (00:04:14) last pick: 0.0000 2.5400
\t (00:04:14) No DRC errors detected.
\t (00:04:14) Changed 1 items out of 1 items found.
\i (00:04:15) pick grid 0.5793 2.7382
\t (00:04:15) last pick: 0.0000 2.5400
\t (00:04:15) No DRC errors detected.
\t (00:04:15) Changed 1 items out of 1 items found.
\i (00:04:15) pick grid 2.9224 2.6592
\t (00:04:15) last pick: 2.5400 2.5400
\t (00:04:15) No DRC errors detected.
\t (00:04:15) Changed 1 items out of 1 items found.
\i (00:04:16) prepopup 1.4744 3.5017
\i (00:04:17) done
\i (00:04:17) generaledit
\i (00:04:29) text edit
\i (00:04:31) setwindow form.textedit
\i (00:04:31) FORM textedit str 1
\i (00:04:31) FORM textedit done
\i (00:04:31) setwindow pcb
\i (00:04:31) pick 0.0000 0.0000
\t (00:04:31) Pick text to edit.
\i (00:04:31) setwindow pcb
\i (00:04:31) generaledit
\i (00:04:33) pick grid -1.0661 2.6987
\t (00:04:33) last pick: 0.0000 2.5400
\i (00:04:34) prepopup -1.0661 2.6987
\i (00:04:35) pick grid -1.2372 2.6987
\t (00:04:35) last pick: 0.0000 2.5400
\i (00:04:38) text edit
\i (00:04:40) setwindow form.textedit
\i (00:04:40) FORM textedit done
\i (00:04:40) setwindow pcb
\i (00:04:40) pick 0.0000 0.0000
\i (00:04:40) setwindow pcb
\i (00:04:40) generaledit
\i (00:04:41) pick grid 0.8163 2.7645
\t (00:04:41) last pick: 0.0000 2.5400
\i (00:04:43) text edit
\i (00:04:46) setwindow form.textedit
\i (00:04:46) FORM textedit done
\i (00:04:46) setwindow pcb
\i (00:04:46) pick 0.0000 0.0000
\i (00:04:46) setwindow pcb
\i (00:04:46) generaledit
\i (00:04:47) pick grid 3.4226 2.6855
\t (00:04:47) last pick: 2.5400 2.5400
\i (00:04:49) text edit
\i (00:04:49) setwindow form.textedit
\i (00:04:49) FORM textedit str 4
\i (00:04:49) FORM textedit done
\i (00:04:49) setwindow pcb
\i (00:04:49) pick 0.0000 0.0000
\t (00:04:49) Pick text to edit.
\i (00:04:49) setwindow pcb
\i (00:04:49) generaledit
\i (00:04:51) zoom in 1
\i (00:04:51) setwindow pcb
\i (00:04:51) zoom in 0.3161 2.6987
\i (00:04:51) trapsize 329
\i (00:04:51) zoom in 1
\i (00:04:51) setwindow pcb
\i (00:04:51) zoom in 0.3161 2.6988
\i (00:04:51) trapsize 165
\i (00:04:51) zoom out 1
\i (00:04:51) setwindow pcb
\i (00:04:51) zoom out 0.3161 2.6988
\i (00:04:51) trapsize 329
\i (00:04:51) zoom out 1
\i (00:04:51) setwindow pcb
\i (00:04:51) zoom out 0.3162 2.6987
\i (00:04:51) trapsize 658
\i (00:04:51) zoom out 1
\i (00:04:51) setwindow pcb
\i (00:04:51) zoom out 0.3161 2.6988
\i (00:04:51) trapsize 1316
\i (00:04:52) save
\e (00:04:52) ERROR(SPMHGE-7): Error(s) occurred, check logfile.
\i (00:04:52) generaledit
\i (00:04:55) setwindow text
\i (00:04:55) close
\i (00:04:56) setwindow pcb
\i (00:04:56) label refdes
\t (00:04:56) Pick text location.
\i (00:04:57) pick grid -2.6325 -0.5658
\t (00:04:57) last pick: -2.5400 0.0000
\t (00:04:57) Enter text string.
\i (00:05:00) setwindow pcb
\i (00:05:00) pick grid 10.1097 -2.1981
\t (00:05:00) last pick: 10.1600 -2.5400
\t (00:05:00) Enter text string.
\i (00:05:05) setwindow form.mini
\i (00:05:05) FORM mini text_name asm
\i (00:05:07) setwindow pcb
\i (00:05:07) pick grid -1.5531 -0.5131
\t (00:05:07) last pick: -2.5400 0.0000
\t (00:05:07) Enter text string.
\i (00:05:10) setwindow pcb
\i (00:05:10) pick -2.5400 0.0000
\i (00:05:14) setwindow form.mini
\i (00:05:14) FORM mini text_name ski
\i (00:05:16) setwindow pcb
\i (00:05:16) pick grid -2.6851 -0.1446
\t (00:05:16) last pick: -2.5400 0.0000
\t (00:05:16) Refdes of this subclass is already defined, change subclass.
\e (00:05:18) Command not found: U
\i (00:05:19) prepopup -2.6851 -0.1446
\i (00:05:21) done
\i (00:05:21) generaledit
\i (00:05:25) save
\i (00:05:25) fillin yes
\t (00:05:26) Symbol 'usb_a_90.psm' created.
\i (00:05:26) generaledit
\i (00:05:40) shape add rect
\i (00:05:50) setwindow form.mini
\i (00:05:50) FORM mini class 'PACKAGE GEOMETRY'
\i (00:05:58) FORM mini subclass PLACE_BOUND_TOP
\i (00:05:58) setwindow pcb
\i (00:05:58) updateport CVPane
\i (00:06:07) pick -14 0
\t (00:06:07) last pick: -14.0000 0.0000
\i (00:06:08) prepopup -5.3178 3.7781
\i (00:06:09) oops
\i (00:06:16) prmed
\i (00:06:18) setwindow form.prmedit
\i (00:06:18) FORM prmedit design
\i (00:06:19) FORM prmedit text
\i (00:06:20) FORM prmedit shapes
\i (00:06:20) FORM prmedit flow_planning
\i (00:06:20) FORM prmedit cancel
\i (00:06:21) setwindow pcb
\i (00:06:21) generaledit
\i (00:06:32) define grid
\t (00:06:32) Spacing fields allow simple equations to aid calculations; prefix with =
\i (00:06:35) setwindow form.grid
\i (00:06:35) FORM grid non_etch non_etch_x_grids 0.1
\i (00:06:36) FORM grid non_etch non_etch_y_grids 0.1
\i (00:06:37) FORM grid all_etch all_etch_x_grids 0.1
\i (00:06:37) FORM grid all_etch all_etch_y_grids 0.1
\i (00:06:37) FORM grid done
\t (00:06:37) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:06:47) setwindow pcb
\i (00:06:47) step pkg map
\i (00:06:48) fillin yes
\i (00:06:53) setwindow form.pkgmap3d
\i (00:06:53) FORM pkgmap3d stplist USB_A.STEP
\i (00:07:01) FORM pkgmap3d rotation_x 90
\i (00:07:05) FORM pkgmap3d overlay YES
\i (00:07:11) FORM pkgmap3d view_orientation Bottom
\i (00:07:18) FORM pkgmap3d offset_y -2
\i (00:07:20) FORM pkgmap3d offset_y 2
\i (00:07:22) FORM pkgmap3d offset_y 3
\i (00:07:28) FORM pkgmap3d offset_y 3.5
\i (00:07:31) FORM pkgmap3d offset_y 3.25
\i (00:07:39) FORM pkgmap3d view_orientation Back
\i (00:07:42) FORM pkgmap3d offset_z 2
\i (00:07:44) FORM pkgmap3d offset_z 3
\i (00:07:46) FORM pkgmap3d save_current
\i (00:07:52) FORM pkgmap3d view_orientation 'Front Left'
\i (00:07:58) FORM pkgmap3d hide_board YES
\i (00:07:59) FORM pkgmap3d hide_board NO
\i (00:08:02) FORM pkgmap3d done
\i (00:08:02) setwindow pcb
\i (00:08:02) generaledit
\i (00:08:10) shape add rect
\i (00:08:17) pick grid -8.2927 3.6728
\t (00:08:17) last pick: -8.3000 3.7000
\i (00:08:25) zoom in 1
\i (00:08:25) setwindow pcb
\i (00:08:25) zoom in 8.5037 -4.4622
\i (00:08:25) trapsize 658
\i (00:08:26) zoom out 1
\i (00:08:26) setwindow pcb
\i (00:08:26) zoom out 8.5037 -4.4622
\i (00:08:26) trapsize 1316
\i (00:08:26) zoom out 1
\i (00:08:26) setwindow pcb
\i (00:08:26) zoom out 8.5037 -4.4622
\t (00:08:26) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing.
\i (00:08:26) trapsize 2633
\i (00:08:27) zoom in 1
\i (00:08:27) setwindow pcb
\i (00:08:27) zoom in -7.3976 -1.4082
\t (00:08:27) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:08:27) trapsize 1316
\i (00:08:27) zoom in 1
\i (00:08:27) setwindow pcb
\i (00:08:27) zoom in -7.3975 -1.4082
\i (00:08:27) trapsize 658
\i (00:08:28) zoom in 1
\i (00:08:28) setwindow pcb
\i (00:08:28) zoom in -7.3975 -1.4082
\i (00:08:28) trapsize 329
\i (00:08:28) zoom in 1
\i (00:08:28) setwindow pcb
\i (00:08:28) zoom in -7.3975 -1.4082
\i (00:08:28) trapsize 165
\i (00:08:31) zoom out 1
\i (00:08:31) setwindow pcb
\i (00:08:31) zoom out -7.3974 -1.4082
\i (00:08:31) trapsize 329
\i (00:08:31) zoom out 1
\i (00:08:31) setwindow pcb
\i (00:08:31) zoom out -7.3975 -1.4082
\i (00:08:31) trapsize 658
\i (00:08:31) zoom out 1
\i (00:08:31) setwindow pcb
\i (00:08:31) zoom out -7.3975 -1.4081
\i (00:08:31) trapsize 1316
\i (00:08:32) zoom in 1
\i (00:08:32) setwindow pcb
\i (00:08:32) zoom in 8.4775 -2.1453
\i (00:08:32) trapsize 658
\i (00:08:32) zoom in 1
\i (00:08:32) setwindow pcb
\i (00:08:32) zoom in 8.4775 -2.1453
\i (00:08:32) trapsize 329
\i (00:08:32) zoom in 1
\i (00:08:32) setwindow pcb
\i (00:08:32) zoom in 8.4775 -2.1453
\i (00:08:32) trapsize 165
\i (00:08:34) pick grid 8.3426 -2.1814
\t (00:08:34) last pick: 8.3000 -2.2000
\i (00:08:35) zoom out 1
\i (00:08:35) setwindow pcb
\i (00:08:35) zoom out 8.5170 -1.6878
\i (00:08:35) trapsize 329
\i (00:08:35) zoom out 1
\i (00:08:35) setwindow pcb
\i (00:08:35) zoom out 8.5170 -1.6878
\i (00:08:35) trapsize 658
\i (00:08:35) zoom out 1
\i (00:08:35) setwindow pcb
\i (00:08:35) zoom out 8.5171 -1.6878
\i (00:08:35) trapsize 1316
\i (00:08:44) prepopup -5.4098 -2.5828
\i (00:08:45) done
\i (00:08:45) generaledit
\i (00:08:46) pick grid -4.9886 -2.2406
\t (00:08:46) last pick: -5.0000 -2.2000
\i (00:08:46) prepopup -4.9886 -2.2406
\i (00:08:49) pick grid -6.0943 -10.1386
\t (00:08:49) last pick: -6.1000 -10.1000
\i (00:08:51) pick grid -5.1729 -2.3459
\t (00:08:51) last pick: -5.2000 -2.3000
\i (00:08:51) pick grid -5.4098 -2.2933
\t (00:08:51) last pick: -5.4000 -2.3000
\i (00:08:53) pick grid -12.2548 3.9988
\t (00:08:53) last pick: -12.3000 4.0000
\i (00:08:55) pick grid -8.2268 3.7356
\t (00:08:55) last pick: -8.2000 3.7000
\i (00:09:14) pick grid -8.2531 3.4723
\t (00:09:14) last pick: -8.3000 3.5000
\i (00:09:16) undo
\i (00:09:16) trapsize 1316
\i (00:09:16) generaledit
\i (00:09:19) shape add rect
\i (00:09:40) pick -14
\t (00:09:40) last pick: -14.0000 3.5000
\i (00:09:41) prepopup -0.6843 -5.3836
\i (00:09:42) oops
\i (00:09:45) pick -7
\t (00:09:45) last pick: -7.0000 3.5000
\i (00:09:46) prepopup -4.2121 -3.4881
\i (00:09:47) oops
\i (00:09:51) pick -8
\t (00:09:51) last pick: -8.0000 3.5000
\i (00:09:52) prepopup -3.2906 -4.3305
\i (00:09:54) oops
\i (00:10:02) pick -8.5 -2
\t (00:10:02) last pick: -8.5000 -2.0000
\i (00:10:03) prepopup -3.2906 -4.3305
\i (00:10:04) oops
\i (00:10:05) roam y -96
\i (00:10:05) roam y -96
\i (00:10:05) roam y 96
\i (00:10:05) roam y 96
\i (00:10:09) pick -8.5 -2
\t (00:10:09) last pick: -8.5000 -2.0000
\i (00:10:11) prepopup -3.6329 -7.7149
\i (00:10:12) oops
\i (00:10:15) pick -8.5 3
\t (00:10:15) last pick: -8.5000 3.0000
\i (00:10:20) prepopup 4.0545 -7.6886
\i (00:10:22) oops
\i (00:10:26) pick -8.5 4
\t (00:10:26) last pick: -8.5000 4.0000
\i (00:10:33) pick 8.5 -40
\t (00:10:33) last pick: 8.5000 -40.0000
\i (00:10:34) prepopup 3.3437 -0.2908
\i (00:10:34) done
\i (00:10:34) generaledit
\i (00:10:35) zoom out 1
\i (00:10:35) setwindow pcb
\i (00:10:35) zoom out 3.3437 -0.2908
\t (00:10:35) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing.
\i (00:10:35) trapsize 2633
\i (00:10:35) zoom out 1
\i (00:10:35) setwindow pcb
\i (00:10:35) zoom out 3.3437 -0.2908
\t (00:10:35) Grids are drawn 0.8000, 0.8000 apart for enhanced viewing.
\i (00:10:35) trapsize 5265
\i (00:10:42) prepopup -13.0842 -18.8249
\i (00:10:43) pick grid -20.8769 -21.6681
\t (00:10:43) last pick: -20.9000 -21.7000
\i (00:10:44) oops
\i (00:10:45) undo
\t (00:10:45) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:10:45) trapsize 1316
\i (00:10:45) generaledit
\i (00:10:50) pick -8.5 4
\t (00:10:50) last pick: -8.5000 4.0000
\i (00:10:52) prepopup -7.9768 -6.0681
\i (00:10:52) pick grid -10.5832 -0.4868
\t (00:10:52) last pick: -10.6000 -0.5000
\i (00:10:57) shape add rect
\i (00:11:01) pick -8.5 4
\t (00:11:01) last pick: -8.5000 4.0000
\i (00:11:08) pick 8.5 -14
\t (00:11:08) last pick: 8.5000 -14.0000
\i (00:11:10) prepopup 6.8188 -6.9105
\i (00:11:14) done
\i (00:11:14) generaledit
\i (00:11:16) add line
\i (00:11:21) setwindow form.mini
\i (00:11:21) FORM mini subclass SILKSCREEN_TOP
\i (00:11:21) setwindow pcb
\i (00:11:21) updateport CVPane
\i (00:11:23) setwindow form.mini
\i (00:11:23) FORM mini line_width 0.1500
\i (00:11:25) setwindow pcb
\i (00:11:25) zoom in 1
\i (00:11:25) setwindow pcb
\i (00:11:25) zoom in -8.4244 4.2257
\i (00:11:25) trapsize 658
\i (00:11:25) zoom in 1
\i (00:11:25) setwindow pcb
\i (00:11:25) zoom in -8.4243 4.2257
\i (00:11:25) trapsize 329
\i (00:11:26) pick grid -8.4967 4.0283
\t (00:11:26) last pick: -8.5000 4.0000
\i (00:11:27) zoom out 1
\i (00:11:27) setwindow pcb
\i (00:11:27) zoom out -8.2861 3.0476
\i (00:11:27) trapsize 658
\i (00:11:27) zoom out 1
\i (00:11:27) setwindow pcb
\i (00:11:27) zoom out -8.2862 3.0477
\i (00:11:27) trapsize 1316
\i (00:11:27) zoom out 1
\i (00:11:27) setwindow pcb
\i (00:11:27) zoom out -8.2862 3.0477
\t (00:11:27) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing.
\i (00:11:27) trapsize 2633
\i (00:11:28) zoom in 1
\i (00:11:28) setwindow pcb
\i (00:11:28) zoom in -8.4442 -14.3280
\t (00:11:28) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:11:28) trapsize 1316
\i (00:11:28) zoom in 1
\i (00:11:28) setwindow pcb
\i (00:11:28) zoom in -8.4442 -14.3279
\i (00:11:28) trapsize 658
\i (00:11:28) zoom in 1
\i (00:11:28) setwindow pcb
\i (00:11:28) zoom in -8.4442 -14.3279
\i (00:11:28) trapsize 329
\i (00:11:28) zoom in 1
\i (00:11:28) setwindow pcb
\i (00:11:28) zoom in -8.4442 -14.3279
\i (00:11:28) trapsize 165
\i (00:11:28) zoom in 1
\i (00:11:28) setwindow pcb
\i (00:11:28) zoom in -8.4442 -14.3279
\i (00:11:28) trapsize 82
\i (00:11:29) pick grid -8.4902 -14.0465
\t (00:11:29) last pick: -8.5000 -14.0000
\i (00:11:29) zoom out 1
\i (00:11:29) setwindow pcb
\i (00:11:29) zoom out -8.5906 -14.2275
\i (00:11:29) trapsize 165
\i (00:11:29) zoom out 1
\i (00:11:29) setwindow pcb
\i (00:11:29) zoom out -8.5906 -14.2276
\i (00:11:29) trapsize 329
\i (00:11:29) zoom out 1
\i (00:11:29) setwindow pcb
\i (00:11:29) zoom out -8.5905 -14.2275
\i (00:11:29) trapsize 658
\i (00:11:29) zoom out 1
\i (00:11:29) setwindow pcb
\i (00:11:29) zoom out -8.5906 -14.2276
\i (00:11:29) trapsize 1316
\i (00:11:29) zoom out 1
\i (00:11:29) setwindow pcb
\i (00:11:29) zoom out -8.5907 -14.2275
\t (00:11:29) Grids are drawn 0.4000, 0.4000 apart for enhanced viewing.
\i (00:11:29) trapsize 2633
\i (00:11:30) zoom in 1
\i (00:11:30) setwindow pcb
\i (00:11:30) zoom in 9.4169 -14.3855
\t (00:11:30) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:11:30) trapsize 1316
\i (00:11:30) zoom in 1
\i (00:11:30) setwindow pcb
\i (00:11:30) zoom in 9.4169 -14.3855
\i (00:11:30) trapsize 658
\i (00:11:30) zoom in 1
\i (00:11:30) setwindow pcb
\i (00:11:30) zoom in 9.4169 -14.3854
\i (00:11:30) trapsize 329
\i (00:11:30) zoom in 1
\i (00:11:30) setwindow pcb
\i (00:11:30) zoom in 9.4169 -14.3854
\i (00:11:30) trapsize 165
\i (00:11:30) zoom in 1
\i (00:11:30) setwindow pcb
\i (00:11:30) zoom in 9.4169 -14.3853
\i (00:11:30) trapsize 82
\i (00:11:30) zoom in 1
\i (00:11:30) setwindow pcb
\i (00:11:30) zoom in 9.4170 -14.3853
\i (00:11:30) trapsize 41
\i (00:11:30) zoom in 1
\i (00:11:30) setwindow pcb
\i (00:11:30) zoom in 9.4170 -14.3853
\i (00:11:30) trapsize 21
\i (00:11:31) zoom out 1
\i (00:11:31) setwindow pcb
\i (00:11:31) zoom out 9.4343 -14.4182
\i (00:11:31) trapsize 41
\i (00:11:31) zoom out 1
\i (00:11:31) setwindow pcb
\i (00:11:31) zoom out 9.4342 -14.4181
\i (00:11:31) trapsize 82
\i (00:11:31) zoom out 1
\i (00:11:31) setwindow pcb
\i (00:11:31) zoom out 9.4342 -14.4181
\i (00:11:31) trapsize 165
\i (00:11:32) pick grid 8.4931 -14.0463
\t (00:11:32) last pick: 8.5000 -14.0000
\i (00:11:33) zoom out 1
\i (00:11:33) setwindow pcb
\i (00:11:33) zoom out 8.4799 -14.0200
\i (00:11:33) trapsize 329
\i (00:11:33) zoom out 1
\i (00:11:33) setwindow pcb
\i (00:11:33) zoom out 8.4799 -14.0199
\i (00:11:33) trapsize 658
\i (00:11:33) zoom out 1
\i (00:11:33) setwindow pcb
\i (00:11:33) zoom out 10.0990 -14.8097
\i (00:11:33) trapsize 1316
\i (00:11:35) zoom in 1
\i (00:11:35) setwindow pcb
\i (00:11:35) zoom in 7.8350 4.2238
\i (00:11:35) trapsize 658
\i (00:11:35) zoom in 1
\i (00:11:35) setwindow pcb
\i (00:11:35) zoom in 7.8350 4.2239
\i (00:11:35) trapsize 329
\i (00:11:35) zoom in 1
\i (00:11:35) setwindow pcb
\i (00:11:35) zoom in 7.8350 4.2239
\i (00:11:35) trapsize 165
\i (00:11:36) pick grid 8.4504 4.0034
\t (00:11:36) last pick: 8.5000 4.0000
\i (00:11:37) zoom out 1
\i (00:11:37) setwindow pcb
\i (00:11:37) zoom out 9.2534 3.3123
\i (00:11:37) trapsize 329
\i (00:11:37) zoom out 1
\i (00:11:37) setwindow pcb
\i (00:11:37) zoom out 9.2533 3.3124
\i (00:11:37) trapsize 658
\i (00:11:37) zoom out 1
\i (00:11:37) setwindow pcb
\i (00:11:37) zoom out 9.2534 3.3124
\i (00:11:37) trapsize 1316
\i (00:11:38) zoom in 1
\i (00:11:38) setwindow pcb
\i (00:11:38) zoom in -8.6218 3.3651
\i (00:11:38) trapsize 658
\i (00:11:40) pick grid -8.5428 4.0233
\t (00:11:40) last pick: -8.5000 4.0000
\i (00:11:41) prepopup -7.7004 4.0233
\i (00:11:42) done
\i (00:11:42) generaledit
\i (00:11:42) zoom out 1
\i (00:11:42) setwindow pcb
\i (00:11:42) zoom out -6.0813 4.4840
\i (00:11:42) trapsize 1316
\i (00:11:43) pick grid 3.2906 5.9056
\t (00:11:43) last pick: 3.3000 5.9000
\i (00:11:44) save
\i (00:11:44) fillin yes
\t (00:11:44) Symbol 'usb_a_90.psm' created.
\i (00:11:44) generaledit
\i (00:11:49) zoom in 1
\i (00:11:49) setwindow pcb
\i (00:11:49) zoom in -1.9219 1.8251
\i (00:11:49) trapsize 658
\i (00:11:49) zoom in 1
\i (00:11:49) setwindow pcb
\i (00:11:49) zoom in -1.9219 1.8252
\i (00:11:49) trapsize 329
\i (00:12:43) save
\i (00:12:44) fillin yes
\t (00:12:44) Symbol 'usb_a_90.psm' created.
\i (00:12:44) generaledit
\i (00:12:45) exit
\t (00:12:46) Journal end - Sun Oct 6 06:58:31 2024

349
thr/allegro.jrl,1
View File

@@ -1,300 +1,49 @@
\t (00:01:39) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:01:39) Journal start - Thu Aug 8 06:55:41 2024
\t (00:01:39) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=19820 CPUs=12
\t (00:01:39) CmdLine= D:\SOFTWARE\Cadence\SPB_17.4\tools\bin\allegro.exe
\t (00:01:39)
\t (00:01:39) Starting new design...
\i (00:01:40) trapsize 19069
\i (00:01:40) trapsize 19592
\i (00:01:40) trapsize 19069
\t (00:01:40) Grids are drawn 1300.4800, 1300.4800 apart for enhanced viewing.
\i (00:01:40) trapsize 24975
\i (00:01:40) trapsize 24975
\i (00:01:40) trapsize 21275
\i (00:01:40) trapsize 21857
\i (00:01:40) trapsize 22472
\i (00:02:01) param in
\i (00:02:01) pick grid dbl -129.0986 82.1419
\t (00:02:01) last pick: -129.5400 81.2800
\i (00:02:02) setwindow form.parm_in
\i (00:02:02) FORM parm_in browse
\i (00:02:05) fillin "D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm"
\i (00:02:06) FORM parm_in execute
\t (00:02:06) Starting Importing parameter file...
\w (00:02:07) WARNING(SPMHGE-269): param in had warnings, use Viewlog to review the log file.
\t (00:02:07) Opening existing design...
\t (00:02:07) Grids are drawn 2.5400, 2.5400 apart for enhanced viewing.
\i (00:02:07) setwindow pcb
\i (00:02:07) trapsize 22472
\i (00:02:07) trapsize 23026
\i (00:02:07) trapsize 22472
\t (00:02:07) Grids are drawn 2.5400, 2.5400 apart for enhanced viewing.
\i (00:02:07) trapsize 23282
\i (00:02:07) trapsize 24826
\i (00:02:08) setwindow text
\i (00:02:08) close
\t (00:02:09) last pick: 377.1102 78.6991
\w (00:02:09) WARNING(SPMHUT-40): Pick is outside the extent of the drawing ... pick again.
\i (00:02:10) setwindow form.parm_in
\i (00:02:10) FORM parm_in cancel
\i (00:02:11) setwindow pcb
\i (00:02:11) zoom in 1
\i (00:02:11) setwindow pcb
\i (00:02:11) zoom in 3.7239 4.2204
\t (00:02:11) Grids are drawn 1.2700, 1.2700 apart for enhanced viewing.
\i (00:02:11) trapsize 12413
\i (00:02:13) add pin
\i (00:02:15) setwindow form.mini
\i (00:02:15) FORM mini pad_name thr-1r3-2r0
\t (00:02:15) Using 'THR-1R3-2R0.pad'.
\i (00:02:17) FORM mini x_count 3
\i (00:02:19) FORM mini next_pin_number 1
\i (00:02:22) FORM mini text_name pin
\i (00:02:44) FORM mini x_spacing 2.5400
\i (00:02:47) setwindow pcb
\i (00:02:47) pick x -2.54
\t (00:02:47) last pick: -2.5400 81.2800
\t (00:02:47) Using 'THR-1R3-2R0.pad'.
\i (00:02:48) prepopup 119.6624 19.8610
\i (00:02:49) oops
\t (00:02:49) Using 'THR-1R3-2R0.pad'.
\i (00:02:53) pick -2.54 0
\t (00:02:53) last pick: -2.5400 0.0000
\t (00:02:53) Using 'THR-1R3-2R0.pad'.
\i (00:02:54) zoom in 1
\i (00:02:54) setwindow pcb
\i (00:02:54) zoom in -2.7308 -2.7309
\i (00:02:54) trapsize 6207
\i (00:02:54) zoom in 1
\i (00:02:54) setwindow pcb
\i (00:02:54) zoom in -2.7308 -2.7309
\i (00:02:54) trapsize 3103
\i (00:02:55) zoom in 1
\i (00:02:55) setwindow pcb
\i (00:02:55) zoom in -2.7308 -2.7309
\i (00:02:55) trapsize 1552
\i (00:02:55) zoom in 1
\i (00:02:55) setwindow pcb
\i (00:02:55) zoom in -2.7308 -2.7309
\i (00:02:55) trapsize 776
\i (00:02:55) prepopup -1.2877 -2.9636
\i (00:02:56) done
\t (00:02:56) Exiting from Add Pin.
\i (00:04:16) add rect
\i (00:04:22) setwindow form.mini
\i (00:04:22) FORM mini class 'PACKAGE GEOMETRY'
\i (00:04:24) FORM mini subclass SILKSCREEN_TOP
\i (00:04:24) setwindow pcb
\i (00:04:24) updateport CVPane
\i (00:04:27) define grid
\t (00:04:27) Spacing fields allow simple equations to aid calculations; prefix with =
\i (00:04:28) setwindow form.grid
\i (00:04:28) FORM grid non_etch non_etch_x_grids 0.1
\i (00:04:29) FORM grid non_etch non_etch_y_grids 0.1
\i (00:04:30) FORM grid all_etch all_etch_x_grids 0.1
\i (00:04:30) FORM grid all_etch all_etch_y_grids 0.1
\i (00:04:31) FORM grid done
\i (00:04:35) setwindow pcb
\i (00:04:35) add line
\i (00:04:39) setwindow form.mini
\i (00:04:39) FORM mini line_width 0.1500
\i (00:05:06) setwindow pcb
\i (00:05:06) pick -5 2.5
\t (00:05:06) last pick: -5.0000 2.5000
\i (00:05:09) ipick 10
\t (00:05:09) last pick: 5.0000 2.5000
\i (00:05:22) ipick 0 4.5
\t (00:05:22) last pick: 5.0000 7.0000
\i (00:05:23) prepopup 4.4223 2.3430
\i (00:05:24) oops
\t (00:05:24) last pick: 5.0000 2.5000
\i (00:05:27) ipick 0 -4.5
\t (00:05:27) last pick: 5.0000 -2.0000
\i (00:05:59) ipick -10
\t (00:05:59) last pick: -5.0000 -2.0000
\i (00:06:01) ipick 0 4.5
\t (00:06:01) last pick: -5.0000 2.5000
\i (00:06:02) prepopup -0.5274 -4.0963
\i (00:06:03) done
\i (00:06:10) shape add rect
\i (00:06:21) pick -5 2.5
\t (00:06:21) last pick: -5.0000 2.5000
\i (00:06:50) pick 5 1.1
\t (00:06:50) last pick: 5.0000 1.1000
\i (00:06:56) prepopup 8.0376 -0.4655
\i (00:06:57) done
\i (00:07:01) save
\e (00:07:01) ERROR(SPMHGE-7): Error(s) occurred, check logfile.
\i (00:07:03) setwindow text
\i (00:07:03) close
\i (00:07:04) setwindow pcb
\i (00:07:04) label refdes
\t (00:07:04) Pick text location.
\i (00:07:08) setwindow form.mini
\i (00:07:08) FORM mini text_name asm
\i (00:07:11) setwindow pcb
\i (00:07:11) pick grid -4.7944 -1.7999
\t (00:07:11) last pick: -4.8000 -1.8000
\t (00:07:11) Enter text string.
\i (00:07:17) setwindow pcb
\i (00:07:17) pick -4.8000 -1.8000
\i (00:07:18) prepopup 5.0119 -3.4756
\i (00:07:19) next
\i (00:07:21) setwindow form.mini
\i (00:07:21) FORM mini subclass SILKSCREEN_TOP
\i (00:07:21) setwindow pcb
\i (00:07:21) updateport CVPane
\i (00:07:26) setwindow form.mini
\i (00:07:26) FORM mini text_name ski
\i (00:07:27) setwindow pcb
\i (00:07:27) pick grid -3.8790 -1.9085
\t (00:07:27) last pick: -3.9000 -1.9000
\t (00:07:27) Enter text string.
\i (00:07:30) setwindow pcb
\i (00:07:30) pick -3.9000 -1.9000
\i (00:07:31) prepopup -1.7222 -2.6688
\i (00:07:31) done
\i (00:07:33) move
\t (00:07:33) Select element(s) to move.
\i (00:07:35) pick grid -3.3979 -1.5206
\t (00:07:35) last pick: -3.4000 -1.5000
\t (00:07:35) last pick: -3.9000 -1.9000
\t (00:07:35) Pick new location for the element(s).
\i (00:07:37) pick grid -4.7634 -1.8619
\t (00:07:37) last pick: -4.8000 -1.9000
\i (00:07:38) prepopup -2.6687 -3.5222
\i (00:07:38) done
\i (00:07:52) shape add rect
\i (00:07:57) setwindow form.mini
\i (00:07:57) FORM mini class 'PACKAGE GEOMETRY'
\i (00:08:01) setwindow pcb
\i (00:08:01) zoom in 1
\i (00:08:01) setwindow pcb
\i (00:08:01) zoom in -4.9961 2.4671
\i (00:08:01) trapsize 388
\i (00:08:01) zoom in 1
\i (00:08:01) setwindow pcb
\i (00:08:01) zoom in -4.9961 2.4672
\i (00:08:01) trapsize 194
\i (00:08:01) zoom in 1
\i (00:08:01) setwindow pcb
\i (00:08:01) zoom in -4.9961 2.4672
\i (00:08:01) trapsize 97
\i (00:08:01) zoom in 1
\i (00:08:01) setwindow pcb
\i (00:08:01) zoom in -4.9961 2.4672
\i (00:08:01) trapsize 48
\i (00:08:03) pick grid -4.9990 2.4992
\t (00:08:03) last pick: -5.0000 2.5000
\i (00:08:04) zoom out 1
\i (00:08:04) setwindow pcb
\i (00:08:04) zoom out -4.8506 2.3673
\i (00:08:04) trapsize 97
\i (00:08:04) zoom out 1
\i (00:08:04) setwindow pcb
\i (00:08:04) zoom out -4.8506 2.3674
\i (00:08:04) trapsize 194
\i (00:08:04) zoom out 1
\i (00:08:04) setwindow pcb
\i (00:08:04) zoom out -4.8506 2.3673
\i (00:08:04) trapsize 388
\i (00:08:04) zoom out 1
\i (00:08:04) setwindow pcb
\i (00:08:04) zoom out -4.8506 2.3674
\i (00:08:04) trapsize 776
\i (00:08:04) zoom out 1
\i (00:08:04) setwindow pcb
\i (00:08:04) zoom out -4.8505 2.3674
\t (00:08:04) Grids are drawn 0.2000, 0.2000 apart for enhanced viewing.
\i (00:08:04) trapsize 1552
\i (00:08:05) zoom in 1
\i (00:08:05) setwindow pcb
\i (00:08:05) zoom in 4.5831 -1.8530
\i (00:08:05) trapsize 776
\i (00:08:05) zoom in 1
\i (00:08:05) setwindow pcb
\i (00:08:05) zoom in 4.5831 -1.8530
\i (00:08:05) trapsize 388
\i (00:08:05) zoom in 1
\i (00:08:05) setwindow pcb
\i (00:08:05) zoom in 4.5831 -1.8530
\i (00:08:05) trapsize 194
\i (00:08:06) zoom in 1
\i (00:08:06) setwindow pcb
\i (00:08:06) zoom in 5.0253 -2.0198
\i (00:08:06) trapsize 97
\i (00:08:06) zoom in 1
\i (00:08:06) setwindow pcb
\i (00:08:06) zoom in 5.0253 -2.0198
\i (00:08:06) trapsize 48
\i (00:08:06) zoom in 1
\i (00:08:06) setwindow pcb
\i (00:08:06) zoom in 5.0253 -2.0198
\i (00:08:06) trapsize 24
\i (00:08:06) zoom in 1
\i (00:08:06) setwindow pcb
\i (00:08:06) zoom in 5.0253 -2.0197
\i (00:08:06) trapsize 12
\i (00:08:06) zoom in 1
\i (00:08:06) setwindow pcb
\i (00:08:06) zoom in 5.0254 -2.0197
\i (00:08:06) trapsize 6
\i (00:08:09) pick grid 5.0248 -2.0493
\t (00:08:09) last pick: 5.0000 -2.0000
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0482 -2.0266
\i (00:08:09) trapsize 12
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0482 -2.0265
\i (00:08:09) trapsize 24
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0481 -2.0266
\i (00:08:09) trapsize 49
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0482 -2.0266
\i (00:08:09) trapsize 97
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0482 -2.0265
\i (00:08:09) trapsize 194
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0483 -2.0265
\i (00:08:09) trapsize 388
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0482 -2.0264
\i (00:08:09) trapsize 776
\i (00:08:09) zoom out 1
\i (00:08:09) setwindow pcb
\i (00:08:09) zoom out 5.0482 -2.0264
\i (00:08:09) trapsize 1553
\i (00:08:10) prepopup 5.0481 -2.0263
\i (00:08:11) done
\i (00:08:11) zoom in 1
\i (00:08:11) setwindow pcb
\i (00:08:11) zoom in 0.8864 -0.5355
\i (00:08:11) trapsize 776
\i (00:08:11) zoom in 1
\i (00:08:11) setwindow pcb
\i (00:08:11) zoom in 0.8864 -0.5355
\i (00:08:11) trapsize 388
\i (00:08:12) save
\i (00:08:12) fillin yes
\t (00:08:12) Symbol 'to220-3.psm' created.
\i (00:08:16) step pkg map
\i (00:08:17) fillin yes
\i (00:08:24) setwindow form.pkgmap3d
\i (00:08:24) FORM pkgmap3d stplist TO220.step
\i (00:08:26) FORM pkgmap3d stplist TS-POINT.STEP
\i (00:08:28) FORM pkgmap3d done
\i (00:08:29) setwindow pcb
\i (00:08:29) save
\i (00:08:29) fillin yes
\t (00:08:29) Symbol 'to220-3.psm' created.
\i (00:08:30) exit
\t (00:08:31) Journal end - Thu Aug 8 07:02:32 2024
\t (00:00:03) allegro 17.4 S035 Windows SPB 64-bit Edition
\t (00:00:03) Journal start - Thu Aug 8 07:02:55 2024
\t (00:00:03) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=21748 CPUs=12
\t (00:00:03) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\thr\to220-3.dra
\t (00:00:03)
(00:00:03) Loading axlcore.cxt
\t (00:00:05) Opening existing design...
\i (00:00:05) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "to220-3"
\d (00:00:05) Design opened: D:/workspace/GitHub/pcb_lib/thr/to220-3.dra
\i (00:00:06) trapsize 419
\i (00:00:06) trapsize 430
\i (00:00:06) trapsize 419
\i (00:00:06) trapsize 368
\i (00:00:06) trapsize 378
\i (00:00:06) trapsize 388
\i (00:00:06) trapsize 399
\i (00:00:10) step pkg map
\i (00:00:11) fillin yes
\i (00:00:17) setwindow form.pkgmap3d
\i (00:00:17) FORM pkgmap3d stplist TO220-3.step
\i (00:00:20) FORM pkgmap3d rotation_x 90
\i (00:00:22) FORM pkgmap3d rotation_x 0
\i (00:00:23) FORM pkgmap3d rotation_y 90
\i (00:00:25) FORM pkgmap3d overlay YES
\i (00:00:31) FORM pkgmap3d offset_y 10
\i (00:00:32) FORM pkgmap3d offset_y 0
\i (00:00:33) FORM pkgmap3d offset_z 10
\i (00:00:34) FORM pkgmap3d offset_z 20
\i (00:00:36) FORM pkgmap3d hide_board YES
\i (00:00:39) FORM pkgmap3d view_orientation Right
\i (00:00:43) FORM pkgmap3d view_orientation Top
\i (00:00:51) FORM pkgmap3d rotation_z 180
\i (00:00:55) FORM pkgmap3d offset_y -2
\i (00:00:56) FORM pkgmap3d offset_y 2
\i (00:00:58) FORM pkgmap3d offset_y 3
\i (00:01:00) FORM pkgmap3d offset_y 2.5
\i (00:01:03) FORM pkgmap3d view_orientation Right
\i (00:01:08) FORM pkgmap3d view_orientation Bottom
\i (00:01:19) FORM pkgmap3d view_orientation Top
\i (00:01:23) FORM pkgmap3d view_orientation Front
\i (00:01:24) FORM pkgmap3d hide_board NO
\i (00:01:32) FORM pkgmap3d save_current
\i (00:01:33) FORM pkgmap3d done
\i (00:01:35) setwindow pcb
\i (00:01:35) save
\i (00:01:35) fillin yes
\t (00:01:36) Symbol 'to220-3.psm' created.
\i (00:01:46) exit
\t (00:01:47) Journal end - Thu Aug 8 07:04:39 2024

6
thr/downrev.log
View File

@@ -2,9 +2,9 @@
( )
( Downrev Design )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:04:28 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:58:30 2024 )
( )
(---------------------------------------------------------------------)

6
thr/downrev.log,1
View File

@@ -2,9 +2,9 @@
( )
( Downrev Design )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:02:31 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:57:30 2024 )
( )
(---------------------------------------------------------------------)

6
thr/downrev.log,2
View File

@@ -2,9 +2,9 @@
( )
( Downrev Design )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:04:28 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:58:30 2024 )
( )
(---------------------------------------------------------------------)

6
thr/downrev.log,3
View File

@@ -2,9 +2,9 @@
( )
( Downrev Design )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:04:28 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:58:30 2024 )
( )
(---------------------------------------------------------------------)

2
thr/master.tag
View File

@@ -1 +1 @@
to220-3.dra
usb_a_90.dra

10
thr/param_read.log
View File

@@ -2,15 +2,15 @@
( )
( Parameter File READ )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 06:56:08 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:46:44 2024 )
( )
(---------------------------------------------------------------------)
Paramfile Name : D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : to220-3.dra
Paramfile Name : D:/Workspace/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : usb_a_90.dra
Reading...parameter_header:
Reading...db_common_type:

128
thr/param_read.log,1 Normal file
View File

@@ -0,0 +1,128 @@
(---------------------------------------------------------------------)
( )
( Parameter File READ )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 06:56:08 2024 )
( )
(---------------------------------------------------------------------)
Paramfile Name : D:/¹¤×÷¿â/GitHub/pcb_lib/XerolySkinner.prm
Layout Name : to220-3.dra
Reading...parameter_header:
Reading...db_common_type:
Reading...grid_parms_type:
WARNING: The value of element <etchcount> is not equal to the number of
user defined subclass under ETCH class.
Reading...UnusedPadsSuppressionSettings:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDTOP"
Reading...art_class_type:
Reading...art_class_type:
Reading...artwork_film:
Reading...art_film_type:
Reading...art_film_block_type:
Reading...art_class_type:
WARNING: Unmatched Data - Field Name: subclass , Value: "SIGNEDBOTTOM"
Reading...art_class_type:
Reading...art_class_type:
Reading...color_table_table:
Reading...ColorParmType:
Reading...profileCustomColors:
Reading...text_size_table:
Reading...drf_parm_type:
Reading...av_parm_type:
Reading...dynfill_parm_type:
Reading...probe_parm_type:
Reading...ifp_parm_type:
Reading...ministat_parm_type:
WARNING: Unmatched Data - Field Name: acon_active_sc , Value: "SIGNEDTOP"
Reading...ats_parm_type:
Reading...placement_parameter_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
Reading...backdrill_parm_type:
..... Total number of errors: 0.
..... Total number of warnings: 4.

14923
thr/stepFacetFiles4Map/USB_A.xml Normal file
View File

File diff suppressed because it is too large Load Diff

3
thr/stepFacetFiles4Map/stepFileInfo.txt
View File

@@ -24,11 +24,12 @@ M3x8.step ! 519917 ! 1710578258
S65125_47uH.STEP ! 11888650 ! 1720513580
SQP-5W100.STEP ! 86521 ! 1722197978
LM2984_with_heat.STEP ! 1632553 ! 1722535173
LM2984.STEP ! 896534 ! 1722522611
L298N_with_heat.STEP ! 2206879 ! 1722540018
LM2984.STEP ! 896534 ! 1722522611
21-0140L_T1655-2-L.step ! 193184 ! 1568096060
thr_conn-th-2x5p.STEP ! 642474 ! 1711699369
thr_dip_2x3.step ! 86870 ! 1712835219
E-cap-16x25x7_5.STEP ! 105352 ! 1719062441
thr_dip_1x4.step ! 336882 ! 1711691285
CONN-8P-P5.STEP ! 557855 ! 1712837489
USB_A.STEP ! 321132 ! 1728166112

3
thr/stepFacetFiles4Map/stepFileInfo.txt,1
View File

@@ -13,6 +13,7 @@ thr-R-5W.STEP ! 189951 ! 1720538891
TS-POINT.STEP ! 23849 ! 1710578258
TO220.step ! 185117 ! 1723070957
D8-L.step ! 282667 ! 1568096060
TO220-3.step ! 185117 ! 1723070957
thr-3r090tb.step ! 2404583 ! 1711452688
DIP_2x5.step ! 720870 ! 1710578258
SQP-10W100.STEP ! 86485 ! 1722196775
@@ -23,8 +24,8 @@ M3x8.step ! 519917 ! 1710578258
S65125_47uH.STEP ! 11888650 ! 1720513580
SQP-5W100.STEP ! 86521 ! 1722197978
LM2984_with_heat.STEP ! 1632553 ! 1722535173
L298N_with_heat.STEP ! 2206879 ! 1722540018
LM2984.STEP ! 896534 ! 1722522611
L298N_with_heat.STEP ! 2206879 ! 1722540018
21-0140L_T1655-2-L.step ! 193184 ! 1568096060
thr_conn-th-2x5p.STEP ! 642474 ! 1711699369
thr_dip_2x3.step ! 86870 ! 1712835219

23
thr/thr_pin.log
View File

@@ -1,23 +0,0 @@
(---------------------------------------------------------------------)
( )
( CREATE SYMBOL )
( )
( Drawing : thr_pin.dra )
( Software Version : 17.4S035 )
( Date/Time : Mon Apr 15 22:50:13 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/thr
Name = thr_pin.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Create symbol started.
Create symbol completed.

BIN
thr/usb_a_90.dra Normal file
View File

Binary file not shown.

14
thr/to220-3.log,3 → thr/usb_a_90.log
View File

@@ -2,18 +2,18 @@
( )
( CREATE SYMBOL )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:02:31 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:58:30 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/thr
Name = to220-3.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Directory = D:/Workspace/GitHub/pcb_lib/thr
Name = usb_a_90.psm
User = Xeroly
Machine = XEROLYSKINNER
Create symbol started.

14
thr/to220-3.log,1 → thr/usb_a_90.log,1
View File

@@ -2,18 +2,18 @@
( )
( CREATE SYMBOL )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:01:03 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:50:38 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/thr
Name = to220-3.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Directory = D:/Workspace/GitHub/pcb_lib/thr
Name = usb_a_90.psm
User = Xeroly
Machine = XEROLYSKINNER
Create symbol started.

14
thr/to220-3.log,2 → thr/usb_a_90.log,2
View File

@@ -2,18 +2,18 @@
( )
( CREATE SYMBOL )
( )
( Drawing : to220-3.dra )
( Software Version : 17.4S035 )
( Date/Time : Thu Aug 8 07:02:14 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:51:11 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/¹¤×÷¿â/GitHub/pcb_lib/thr
Name = to220-3.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Directory = D:/Workspace/GitHub/pcb_lib/thr
Name = usb_a_90.psm
User = Xeroly
Machine = XEROLYSKINNER
Create symbol started.

14
thr/thr_pin.log,1 → thr/usb_a_90.log,3
View File

@@ -2,18 +2,18 @@
( )
( CREATE SYMBOL )
( )
( Drawing : thr_pin.dra )
( Software Version : 17.4S035 )
( Date/Time : Mon Apr 15 22:49:46 2024 )
( Drawing : usb_a_90.dra )
( Software Version : 23.1P001 )
( Date/Time : Sun Oct 6 06:57:30 2024 )
( )
(---------------------------------------------------------------------)
Create Symbol of type: PACKAGE
Directory = D:/workspace/GitHub/pcb_lib/thr
Name = thr_pin.psm
User = XerolySkinner
Machine = LAPTOP-XEROLYSK
Directory = D:/Workspace/GitHub/pcb_lib/thr
Name = usb_a_90.psm
User = Xeroly
Machine = XEROLYSKINNER
Create symbol started.

BIN
thr/usb_a_90.psm Normal file
View File

Binary file not shown.