35 lines
1.5 KiB
Plaintext
35 lines
1.5 KiB
Plaintext
\t (00:00:05) allegro 17.4 S035 Windows SPB 64-bit Edition
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\t (00:00:05) Journal start - Fri Mar 29 01:30:57 2024
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\t (00:00:05) Host=LAPTOP-XEROLYSK User=XerolySkinner Pid=20912 CPUs=12
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\t (00:00:05) CmdLine= d:\software\cadence\spb_17.4\tools\bin\allegro.exe D:\workspace\GitHub\pcb_lib\smc\id8.dra
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\t (00:00:05)
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(00:00:05) Loading axlcore.cxt
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\t (00:00:05) Opening existing design...
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\i (00:00:05) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged id8
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\d (00:00:05) Design opened: D:/workspace/GitHub/pcb_lib/smc/id8.dra
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\t (00:00:06) Grids are drawn 0.2002, 0.2002 apart for enhanced viewing.
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\i (00:00:06) trapsize 1340
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\i (00:00:06) trapsize 1375
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\i (00:00:07) trapsize 1340
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\i (00:00:07) trapsize 1175
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\i (00:00:08) trapsize 1207
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\i (00:00:08) trapsize 1241
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\t (00:00:08) Grids are drawn 0.2002, 0.2002 apart for enhanced viewing.
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\i (00:00:08) trapsize 1274
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\i (00:00:13) step pkg map
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\i (00:00:14) fillin yes
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\i (00:00:21) setwindow form.pkgmap3d
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\i (00:00:21) FORM pkgmap3d stplist ID8.STEP
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\i (00:00:23) FORM pkgmap3d overlay YES
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\i (00:00:25) FORM pkgmap3d view_orientation 'Front Right'
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\i (00:00:28) FORM pkgmap3d view_orientation Top
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\i (00:00:32) FORM pkgmap3d view_orientation 'Front Right'
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\i (00:00:34) FORM pkgmap3d save_current
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\i (00:00:38) FORM pkgmap3d done
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\i (00:00:39) setwindow pcb
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\i (00:00:39) exit
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\e (00:00:39) Do you want to save the changes you made to id8.dra?
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\i (00:00:39) fillin yes
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\t (00:00:40) Symbol 'id8.psm' created.
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\t (00:00:41) Journal end - Fri Mar 29 01:31:32 2024
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